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364 Commits

Author SHA1 Message Date
Walter F.J. Mueller
b06cbef00a - interim release w11a_V0.57 (untagged) 
- new C++ and Tcl based backend server supports now RK11 handling
- w11a systems operate with rlink over USB on nexsy2 and nexsy3 boards.
  See w11a_os_guide.txt for details
 2013-04-27 14:21:46 +00:00
Walter F.J. Mueller
99de9893cb - interim release w11a_V0.562 (untagged) 
- C++ and Tcl based backend server: many support classes for interfacing to 
  w11 system designs, and the associated Tcl bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler. 
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs
 2013-04-13 17:13:15 +00:00
Walter F.J. Mueller
29d2dc5bef - interim release w11a_V0.561 (untagged) 
- Added simple simulation model of Cypress FX2 and test benches for
  functional verifcation of FX2 controller
- Bugfixes in FX2 firmware and controller, works now also on Nexys3 & Atlys
- Added test systems for rlink over USB verification for Nexys3 & Atlys
 2013-01-06 16:19:26 +00:00
Walter F.J. Mueller
cbd8ce3468 - interim release w11a_V0.56 (untagged) 
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
        in the file README_USB-VID-PID.txt. You'll be responsible for any
        misuse of the defaults provided with the project sources !!
 2013-01-02 21:06:53 +00:00
Walter F.J. Mueller
f6775f7d05 - interim release w11a_V0.55 (untagged) 
- added xon/xoff (software flow control) support to serport library
- added test systems for serport verification
- use new serport stack in sys_w11a_* and sys_tst_rlink_* systems
 2011-12-23 10:38:59 +00:00
Walter F.J. Mueller
f2d0f39621 - interim release w11a_V0.54 (untagged) 
- add Nexys3 port of w11a
 2011-12-04 21:25:09 +00:00
Walter F.J. Mueller
d76323ec6c - fix tools/tcl/setup_packages and tools/src/Makefile 2011-11-21 17:48:39 +00:00
Walter F.J. Mueller
3f455d5236 - interim release w11a_V0.532 (untagged) 
- re-organize modules 'human I/O' interface on Digilent boards
- add test designs for 'human I/O' interface for atlys,nexys2, and s3board
- small updates in crc8 and dcm areas
- with one exception all vhdl sources use now numeric_std
 2011-11-20 12:31:43 +00:00
Walter F.J. Mueller
e15295649e - interim release w11a_V0.531 (untagged) 
- many small changes to prepare upcoming support for Spartan-6 and
  usage of Cypress FX2 USB interface on nexys2/3 and atlys boards
 2011-09-12 20:52:31 +00:00
Walter F.J. Mueller
0f28defb8a - final touch-up for V0.53 minor release 2011-04-17 12:32:28 +00:00
Walter F.J. Mueller
a20f49fcd5 - add sources for C++/Tcl based backend, add directories 
- tools/src/...
  - tools/tcl/...
  - tools/dox
  - tools/make
- add rlink test system
  - rtl/sys_gen/tst_rlink/nexys2/...
 2011-04-02 11:08:56 +00:00
Walter F.J. Mueller
c3d40ba4b9 - interim release w11a_V0.52 (untagged) 
- migrate to rbus protocol verion 3
  - reorganize rbus and rlink modules, many renames
 2011-01-02 13:39:34 +00:00
Walter F.J. Mueller
16ce5b2091 - interim release w11a_V0.51 (untagged) 
- migrate to ibus protocol verion 2
  - nexys2 systems now with DCM derived system clock supported
  - sys_w11a_n2 now runs with 58 MHz clksys
 2010-11-27 23:17:50 +00:00
Walter F.J. Mueller
3335c61549 initial source upload (no docs yet) 2010-07-09 18:14:38 +00:00