Walter F.J. Mueller
0e96fa106b
added preliminary and FPFA untested(!) support for nexys4 DDR board
...
- rtl/bplib/nexys4d: added board support
- rtl/sys_gen
- tst_rlink/nexys4d: rlink tester design
- tst_serloop/nexys4d: serial port tester design
- tst_snhumanio/nexys4d: human IO tester design
- w11a/nexys4d_bram: w11 design using BRAM only
2017-01-04 22:12:29 +01:00
Walter F.J. Mueller
92e149437d
Fix license disclaimer
2016-12-26 21:27:33 +01:00
Walter F.J. Mueller
5983b0bb2a
- upgraded CRAM controller, now with 'page mode' support
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- new test bench driver tbrun, give automatized test bench execution
2016-10-15 07:42:21 +00:00
Walter F.J. Mueller
2b5cfb7d96
- Code base cleaned-up for vivado, fsm now inferred
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- xsim support complete (but many issues to be resolved yet)
- Added configurable w11a cache
- Removed some never documented and now strategically obsolete designs
2016-06-26 16:02:42 +00:00
Walter F.J. Mueller
e1479d4e5d
- Add Arty support (BRAM only)
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- Add sysmon/xadc support (for nexys4,basys3,arty designs)
- Add Vivado simulator support (DPI not yet working)
2016-03-19 15:45:59 +00:00
Walter F.J. Mueller
e91847f8db
- added support for Vivado
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- added support for Nexys4 and Basys3 boards
- added RL11 disk support
- lots of documentation updated
2015-03-09 19:26:25 +00:00
