8 Commits

Author	SHA1	Message	Date
wfjm	f40108cb95	drop DM_STAT_SY, add DM_STAT_CA and cache monitoring	2018-10-07 08:50:11 +02:00
wfjm	dfa2a91a18	get disclaimers in line with GPL V3 License.txt	2018-01-02 21:57:40 +01:00
Walter F.J. Mueller	5983b0bb2a	- upgraded CRAM controller, now with 'page mode' support ... - new test bench driver tbrun, give automatized test bench execution	2016-10-15 07:42:21 +00:00
Walter F.J. Mueller	2b5cfb7d96	- Code base cleaned-up for vivado, fsm now inferred ... - xsim support complete (but many issues to be resolved yet) - Added configurable w11a cache - Removed some never documented and now strategically obsolete designs	2016-06-26 16:02:42 +00:00
Walter F.J. Mueller	4a032e9436	- added RH70/RP/RM big disk support ... - many cleanups	2015-05-14 17:00:36 +00:00
Walter F.J. Mueller	e91847f8db	- added support for Vivado ... - added support for Nexys4 and Basys3 boards - added RL11 disk support - lots of documentation updated	2015-03-09 19:26:25 +00:00
Walter F.J. Mueller	3f455d5236	- interim release w11a_V0.532 (untagged) ... - re-organize modules 'human I/O' interface on Digilent boards - add test designs for 'human I/O' interface for atlys,nexys2, and s3board - small updates in crc8 and dcm areas - with one exception all vhdl sources use now numeric_std	2011-11-20 12:31:43 +00:00
Walter F.J. Mueller	3335c61549	initial source upload (no docs yet)	2010-07-09 18:14:38 +00:00