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Mono Color

• 0aa898c7a6 xics: Rework the irq_gen process Paul Mackerras 2021-10-19 15:13:31 +11:00
• 1720a0584a Use alternative count-leading-zeroes algorithm in the FPU and LSU Paul Mackerras 2022-02-21 12:06:11 +11:00
• 1086988883 countzero: Use alternative algorithm for higher bits Paul Mackerras 2022-02-21 09:58:07 +11:00
• 4cf2921b0b soc: Re-do peripheral address decode to improve timing Paul Mackerras 2021-10-11 17:46:44 +11:00
• 27b660ef76 Merge pull request #346 from mkj/dmi_ecp5 Michael Neuling 2022-02-08 09:09:22 +11:00
• 5a5a082601 Merge pull request #343 from mikey/orange-crab-ci Anton Blanchard 2022-02-07 17:57:08 +11:00
• 9c64f8a98b mw_debug: Add Lattice ECP5 support Matt Johnston 2022-02-04 15:29:40 +08:00
• 3775650df3 dmi_dtm_ecp5: Use ECP5 JTAGG for DMI Matt Johnston 2021-11-26 10:47:07 +08:00
• eb20195a10 mw_debug: Link urjtag statically Matt Johnston 2022-02-04 14:40:42 +08:00
• 763138798e mw_debug: use isxdigit for hex arguments Matt Johnston 2022-02-04 12:08:07 +08:00
• 04cc4a842c mw_debug: Add -s frequency argument Matt Johnston 2021-11-26 10:43:06 +08:00
• e05ae0c8cb mw_debug: pass target parameters to urjtag Matt Johnston 2021-11-25 14:12:13 +08:00
• 49ec80ac3e fetch1/icache1: Remove the use_previous logic Paul Mackerras 2021-10-11 17:23:08 +11:00
• cef3660e74 Merge pull request #345 from antonblanchard/popcnt-go-fast Paul Mackerras 2022-02-04 11:43:42 +11:00
• 2491aa7fc5 core: Make popcnt* take two cycles Paul Mackerras 2021-10-19 12:22:10 +11:00
• 11c5ac68e8 Fix caravel script asic-3 Anton Blanchard 2022-02-01 21:03:56 +11:00
• c7ef75b55c Forgot multiply.vhdl Anton Blanchard 2022-02-01 20:52:58 +11:00
• e70d7f0a60 Make caches 1 way Anton Blanchard 2022-01-07 11:36:12 +11:00
• 7da4977028 Disable FPU Anton Blanchard 2021-12-30 12:17:25 +11:00
• 1383bbb8be Add GPIOs Anton Blanchard 2021-10-29 20:05:19 +11:00
• 46a85cb274 Add asic alternate reset address Anton Blanchard 2022-02-01 19:55:56 +11:00
• 4e9001ba19 Hook up JTAG to asic top level Anton Blanchard 2021-10-26 15:15:02 +11:00
• 09c8b0332e Cut down hello_world to fit in 4kB Anton Blanchard 2021-10-26 12:21:26 +11:00
• f4a52fdc1f Add a script to post process the microwatt verilog for caravel Anton Blanchard 2020-12-17 15:14:54 +11:00
• 125cd4bc97 Update PVR Anton Blanchard 2021-01-14 10:21:33 +11:00
• 0f864ae8b9 Update JTAG TAP controller for Microwatt Anton Blanchard 2020-12-08 18:55:08 +11:00
• fd9350c3b5 First pass at an external JTAG port Anton Blanchard 2022-02-01 08:44:00 +11:00
• 18503732d7 Add ASIC target Anton Blanchard 2021-03-24 22:00:27 +11:00
• 5ac715d932 Fix multiplier behavioural Anton Blanchard 2022-02-01 20:22:31 +11:00
• 537a0aac1d Add arrays for ASIC flow Anton Blanchard 2021-03-23 19:44:16 +11:00
• ef641dcc28 Allow ALT_RESET_ADDRESS to be overridden Anton Blanchard 2022-02-01 20:06:57 +11:00
• 286757f0f7 ci: Add new Orange Crab build Michael Neuling 2022-01-18 12:41:03 +11:00
• 6ff3b2499c Merge pull request #342 from mkj/orangecrab-merge Michael Neuling 2022-01-18 13:27:27 +11:00
• cdd661d844 Merge branch 'master' into orangecrab-merge Michael Neuling 2022-01-18 12:03:46 +11:00
• fda8879e2f Merge pull request #341 from mkj/progtools Michael Neuling 2022-01-18 11:51:54 +11:00
• ffbf2f9964 Merge pull request #340 from mkj/orangecrab-ghdl-plugin Michael Neuling 2022-01-18 11:50:22 +11:00
• 049f0549d8 orangecrab: Fix sdcard wishbone addressing Matt Johnston 2021-11-19 13:13:15 +08:00
• abc6a4f372 orangecrab: use litesdcard Matt Johnston 2022-01-14 08:04:18 +08:00
• 42959184dd litesdcard: add lattice, regenerate Matt Johnston 2022-01-14 08:08:09 +08:00
• d794cc70b1 orangecrab: No BTC, LOG_LENGTH, dram NUM_LINES Matt Johnston 2021-08-23 10:30:40 +08:00
• a8d9203c5d orangecrab: Use litedram Matt Johnston 2022-01-13 16:51:57 +08:00
• 57d4c4c117 orangecrab: set HAS_SHORT_MULT Matt Johnston 2021-11-24 16:47:16 +08:00
• a9b467f43b orangecrab: add Orange Crab r0.2 target Matt Johnston 2021-08-11 13:11:57 +08:00
• 8901e84d8d litedram: Add orangecrab-85-0.2 target Matt Johnston 2021-08-13 10:07:15 +08:00
• 08021ae28e litedram: set Makefile -Werror Matt Johnston 2021-09-24 12:24:29 +08:00
• 5a3cdc8b22 litedram: disable block_until_ready, regenerate Matt Johnston 2022-01-14 07:23:35 +08:00
• 5e90133b61 Makefile: add ecpprog targets Matt Johnston 2021-11-26 10:33:55 +08:00
• 7761bf8b71 Makefile: Add DFU programming Matt Johnston 2021-08-11 13:07:34 +08:00
• 2ec0d5fccd Makefile: detect when ghdl is a yosys plugin Matt Johnston 2021-08-11 15:17:39 +08:00
• 67164a6ffa Merge pull request #338 from shenki/yosys-read-verilog Anton Blanchard 2022-01-09 08:08:48 +11:00
• 9ceb463957 Makefile: Use read_verilog with yosys Joel Stanley 2021-12-21 09:02:24 +10:30
• 7fa7b45faa Merge pull request #337 from paulusmack/fixes Michael Neuling 2021-10-25 16:49:19 +11:00
• d458b5845c ECP5: Adjust PLL constants so the PLL lock indication works Paul Mackerras 2021-10-16 19:24:14 +11:00
• 8a030502a2 Merge pull request #336 from paulusmack/fixes Michael Neuling 2021-10-13 17:44:47 +11:00
• a5c9b3c412 Makefile: Add a target for the Orange Crab v0.21 with LFE5U-85F Paul Mackerras 2021-10-12 18:30:36 +11:00
• ceb15d3ca8 Hack to test under verilator boxarty-20211011 Anton Blanchard 2021-10-08 11:05:34 +11:00
• 376ad8da3d boxarty rebased Michael Neuling 2021-08-11 10:43:46 +10:00
• 9cbe1f4a17 Merge pull request #334 from antonblanchard/icbi-issue Michael Neuling 2021-09-28 09:06:18 +10:00
• 099862bee9 Merge pull request #335 from ozbenh/misc Anton Blanchard 2021-09-28 06:18:59 +10:00
• e675eba0df icache: req_laddr becomes req_raddr Benjamin Herrenschmidt 2021-09-27 22:03:18 +10:00
• 5cfa65e836 Introduce addr_to_wb() and wb_to_addr() helpers Benjamin Herrenschmidt 2021-09-27 21:53:52 +10:00
• d745995207 Introduce real_addr_t and addr_to_real() Benjamin Herrenschmidt 2021-09-27 21:50:57 +10:00
• 2d142a6c01 tests/misc: Add a store/dcbz test icbi-issue Anton Blanchard 2021-09-23 15:47:52 +10:00
• 00259458c7 tests/misc: Add an icbi test Anton Blanchard 2021-09-23 12:23:22 +10:00
• 13439c76ba Merge pull request #333 from ozbenh/wukong Anton Blanchard 2021-09-27 13:41:37 +10:00
• d564672a82 Regenerate litedram and liteeth Benjamin Herrenschmidt 2021-09-24 14:24:37 +10:00
• da0189af1e Add support for QMTech Wukong v2 board Benjamin Herrenschmidt 2021-09-24 14:24:37 +10:00
• 621a0f6b28 fpga/clk_gen_plle2: Add support for 50Mhz->100Mhz Benjamin Herrenschmidt 2021-09-24 14:24:37 +10:00
• 4b1a413a2f Add support for more spansion flash Benjamin Herrenschmidt 2021-09-24 14:24:37 +10:00
• c7579d74b0 Merge pull request #332 from paulusmack/fixes Anton Blanchard 2021-09-25 15:15:24 +10:00
• 70270c066a dcache: Fix bug with dcbz closely following stores with the same tag Paul Mackerras 2021-09-25 13:18:59 +10:00
• 9b3b57710a icache: Fix icache invalidation Paul Mackerras 2021-09-25 11:34:38 +10:00
• 83dea94793 decode1: Conditional trap instructions don't need to be single-issue Paul Mackerras 2021-09-25 13:26:09 +10:00
• 9aaa6d3ca3 Merge pull request #330 from antonblanchard/orange-crab-freq Paul Mackerras 2021-09-25 09:35:01 +10:00
• 537e446562 Merge pull request #331 from ozbenh/misc Anton Blanchard 2021-09-24 15:30:22 +10:00
• e6cb72fcd9 Add liteeth/build to gitignore Benjamin Herrenschmidt 2021-09-24 14:23:06 +10:00
• b557ec3a05 mw_debug: Default to jtag backend if unspecified Benjamin Herrenschmidt 2021-09-24 14:23:06 +10:00
• 4bdfef9a20 mw_debug: Probe cable if unspecified Benjamin Herrenschmidt 2021-09-24 14:23:06 +10:00
• 814d6914d0 flash-arty: Add cable argument Benjamin Herrenschmidt 2021-09-24 14:23:06 +10:00
• af6bc48d36 Merge pull request #329 from paulusmack/wb-fix Anton Blanchard 2021-09-24 14:19:26 +10:00
• 06266fe84a Orange Crab is 48MHz not 50MHz, bump PLL frequency orange-crab-freq Anton Blanchard 2021-09-24 12:43:33 +10:00
• 0a415410c9 Merge pull request #328 from paulusmack/shortmult Michael Neuling 2021-09-16 16:07:05 +10:00
• c2f5db6fca Merge pull request #327 from paulusmack/master Michael Neuling 2021-09-16 15:24:36 +10:00
• ca4eb46aea Make wishbone addresses be in units of doublewords or words Paul Mackerras 2021-09-15 18:18:09 +10:00
• 734e4c4a52 core: Add a short multiplier Paul Mackerras 2021-09-11 17:10:20 +10:00
• bb5f356386 loadstore1: Make r1.req.addr not depend on l_in.valid Paul Mackerras 2021-09-13 17:25:52 +10:00
• 2224b28c2c Merge pull request #324 from paulusmack/master Michael Neuling 2021-09-13 12:11:24 +10:00
• 54b0e8b8c8 core: Predict not-taken conditional branches using BTC Paul Mackerras 2021-09-07 20:38:00 +10:00
• 0cdaa2778f xilinx-mult: Move some registers later in the data flow Paul Mackerras 2021-09-07 09:32:30 +10:00
• 77d9891d2f Merge pull request #326 from antonblanchard/dcache-nc-fix Paul Mackerras 2021-09-11 11:57:04 +10:00
• 39e1d10069 Merge pull request #325 from paulusmack/fixes Anton Blanchard 2021-09-10 21:04:08 +10:00
• b29c58f3d1 dcache: Loads from non-cacheable PTEs load entire 64 bits dcache-nc-fix Anton Blanchard 2021-09-10 20:51:53 +10:00
• d4cfdb1bfe decode1: Fix form of isel marked as single-issue Paul Mackerras 2021-05-14 08:41:59 +10:00
• 09bd01a49e Merge pull request #323 from paulusmack/fixes Michael Neuling 2021-09-06 17:17:37 +10:00
• 06e07c69a8 decode1: Fix maddld and maddhdu to not set CR0 Paul Mackerras 2021-09-04 19:36:02 +10:00
• a68921edca core: Fix mcrxrx, addpcis and bpermd Paul Mackerras 2021-09-04 18:20:54 +10:00
• 18eb029f0a Merge pull request #322 from paulusmack/fixes Michael Neuling 2021-09-03 12:07:06 +10:00
• ba34914465 tests/misc: Add a test for a load that hits two preceding stores Paul Mackerras 2021-08-31 11:45:57 +10:00
• 0b23a5e760 dcache: Simplify data input to improve timing Paul Mackerras 2021-08-30 18:24:49 +10:00
• 1a9834c506 dcache: Fix bug with forwarding of stores Paul Mackerras 2021-08-31 19:47:14 +10:00