Commit Graph

9 Commits

Author SHA1 Message Date
Andrew Kay
c49a82f588 First hardware test of coax_rx, increase clk frequency 2020-07-05 16:13:36 -05:00
Andrew Kay
9dd8d37ef5 wip 2020-06-16 16:53:53 -05:00
Andrew Kay
03af715ec5 Start over 2020-06-14 10:05:02 -05:00
Andrew Kay
b750c9e756 Drop shims, for now 2020-03-03 19:52:56 -06:00
Andrew Kay
891390cb84 Attempt DP8340 and DP8341 shims 2020-02-21 20:43:52 -06:00
Andrew Kay
811a048685 Initial attempt at receiver 2020-02-17 20:47:46 -06:00
Andrew Kay
81c6172e7b Bit timer module 2020-02-14 20:13:01 -06:00
Andrew Kay
d4eaeecec2 Hello world 2020-02-12 23:13:21 -06:00
Andrew Kay
ad7ba12d2c Verilog templating 2020-02-04 22:11:14 -06:00