github.com/rcornwell.sims
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Code Releases Activity
853 Commits 4 Branches 0 Tags
9459c2030cefbcf8bcf59633d6d1f19dfc1e7acf
Commit Graph

21 Commits

Author SHA1 Message Date
AZBevier
18eb91cd6d SEL32: Correct interrupt processing during blocked mode. 
SEL32: Coverity errors.
SEL32: Change UDP/DPII support.
 2020-03-09 19:47:47 -07:00
Richard Cornwell
1d092eb60b SEL32: Cleanup various coverity errors. 2020-03-08 21:22:33 -04:00
AZBevier
d198882980 SEL32: Correct real time clock interrupt processing. 
SEL32: start code cleanup.
SEL32: add mfp and mfp scsi disk intitial support code.
SEL32: add new files sel32_mfp.c and sel32_scsi.c to makefile.
SEL32: modify sel32_mt.c code to define tape as BTP for UTX.
 2020-03-06 21:41:59 -07:00
AZBevier
7e3d17ef2c SEL32: Update console device to pass SEL diags. 
SEL32: Update disk devices to hold current STAR in UNIT structure.
SEL32: Add new disk geometry macros.
SEL32: Revise disk formatting support for UTX.
SEL32: Revise INCH command support for all devices.
 2020-02-17 12:45:22 -07:00
AZBevier
18215f0e73 SEL32: Allow channel address reconfiguration. 
SEL32: Add disk definitions for UTX and MPX.
SEL32: Add disk initialization for UTX and MPX HSDP & DISK controllers.
SEL32: Add read/write track/sector label simulation for UTX & MPX.
SEL32: Create revised initialization test files for SIMH.
 2020-02-04 18:16:35 -07:00
AZBevier
1a2eefec9d SEL32: Add more UTX support for V6 & V9 processors. 
SEL32: Fix ADFD, SUFD, MPFD, DVFD instructions display.
SEL32: Change console output to handle 8 bit parity for UTX.
SEL32: Correct RPSWT instruction for V9 processor.
SEL32: Reverse scan order of channel complete and interrupts.
SEL32: Move memory and map register r/w macros to sel32_defs.h.
 2020-01-11 13:55:02 -07:00
AZBevier
4c012098ef SEL32: Rewrite mapping and address translation software. 2019-12-18 20:56:01 -07:00
AZBevier
66f49759a2 SEL32: Add changes to support SEL diagnostics. 2019-11-01 20:52:17 -07:00
AZBevier
8ff8b7a1b7 SEL32: Change diagnostic output to fixed fields. 
SEL32: Add changes to instruction processing to pass more SEL32 diagnostics.
 2019-10-04 18:54:48 -07:00
AZBevier
caa3398164 SEL32: Correct opcode processing errors caught by Gould diagnostics. 
SEL32: Do some code cleanup.
 2019-08-04 10:50:01 -07:00
Richard Cornwell
598356c5ad SEL32: More code cleanup. 2019-08-03 13:55:56 -04:00
AZBevier
53026c66c3 SEL32: Add three missing basemode instructions. 
SEL32: Handle multiple EOFs on MT.
SEL32: Correct basemode instruction processing and display errors.
SEL32:Fix ex -m to display basemode instructions.
 2019-07-25 12:58:19 -07:00
Richard Cornwell
237a87df8b SEL32: Cleanup magtape controller. 2019-07-23 20:38:01 -04:00
AZBevier
a928745c55 SEL32: Change INCH/NOP command handling for UTX. 
SEL32: Remove unused debug code.
 2019-07-18 17:23:39 -07:00
James C. Bevier
3dae6f7939 SEL32: Correct rewind processing code. 2019-07-17 21:39:18 -04:00
James C. Bevier
7db3eac8a7 SEL32: Correct tape write and rewind tape handling. 2019-07-17 21:39:18 -04:00
James C. Bevier
08ec8de37a SEL32: Update for simh merge 2019-07-17 21:39:18 -04:00
James C. Bevier
e1b4fc55a4 SEL32: Fix chan_end calls 2019-07-17 21:39:18 -04:00
James C. Bevier
d9283178d9 SEL32: Reformat files to use DOS format and no tabbing 2019-07-17 21:39:18 -04:00
James C. Bevier
d3d4e808cc SEL32: Initial commit of working simulator. 2019-07-17 21:39:18 -04:00
Richard Cornwell
c27809c194 SEL32: Added test cases, more devices. 2019-07-17 21:39:18 -04:00