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mirror of synced 2026-01-18 16:57:00 +00:00

38 Commits

Author SHA1 Message Date
Romain Dolbeau
55b8b7697e enable the XOR in HW for CBC mode, some R/W protect on registers 2020-12-21 09:03:57 -05:00
Romain Dolbeau
0f737c1064 switch driver code to basic aes128-cbc support, where openssl and devcrypto are in agreement 2020-12-21 06:59:44 -05:00
Romain Dolbeau
c7ecb4b128 Having a go at basic opencrypto/aes-ctr support, but it seems OpenSSL and /dev/crypto disagree on the interface :-( 2020-12-21 05:27:36 -05:00
Romain Dolbeau
8afe45ea54 Adding basic AES support (using AES block from https://github.com/mbgh/aes128-hdl) 2020-12-20 11:19:25 -05:00
Romain Dolbeau
1b25261073 Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main 2020-12-19 07:21:42 -05:00
Romain Dolbeau
b7244a4060 unify LED register with others 2020-12-19 05:59:07 -05:00
Romain Dolbeau
d1aa7748ea new prom 2020-12-18 19:55:22 +01:00
Romain Dolbeau
fe5f869db0 new prom 2020-12-18 13:50:08 -05:00
Romain Dolbeau
d5a5041562 larger DMA burst (Burst16 disabled, as it doesn't work on the SS20, presumably hitting the limit of the 'up-burst-sizes' attribute https://mail-index.netbsd.org/port-sparc/2020/12/18/msg002291.html) 2020-12-18 12:47:33 -05:00
Romain Dolbeau
75d40d76c1 add soe rigidity 2020-12-18 16:55:44 +01:00
Romain Dolbeau
62198d5494 12 bits of blocks in GCM DMA 2020-12-18 10:15:05 -05:00
Romain Dolbeau
6d4235c794 only alloc/map/load once per write() 2020-12-18 09:38:09 -05:00
Romain Dolbeau
9a5892be71 disable tracing 2020-12-18 09:25:17 -05:00
Romain Dolbeau
92c7751290 basic DMA support 2020-12-18 07:28:30 -05:00
Romain Dolbeau
10447bb7ec master mode: 1 cycle delay between receiving ACK and reading data... 2020-12-18 07:13:34 -05:00
Romain Dolbeau
7cbd2d68a6 ultra-preliminary support for a bus master DMA) 2020-12-17 07:18:13 -05:00
Romain Dolbeau
1bec4569ec add some extra registers for potential DMA 2020-12-16 09:37:54 -05:00
Romain Dolbeau
eb473454ce Improve reset (?), add IOBUF on some signals that are INOUT when including 'master' mode (but not yet Extended Transfer for which 'master' is a pretty much a prerequisite) 2020-12-16 09:10:18 -05:00
Romain Dolbeau
d1e36d05da more comments 2020-12-16 05:22:50 -05:00
Romain Dolbeau
d696ae0209 signal comment 2020-12-16 05:17:30 -05:00
Romain Dolbeau
04284d7f6f change ROM 'LEDs show that the board has been probed' 2020-12-16 05:03:14 -05:00
Romain Dolbeau
71b1995dea cleanup 2020-12-16 04:55:32 -05:00
Romain Dolbeau
3738909f37 LEDs show that the board has been probed 2020-12-16 10:15:37 +01:00
Romain Dolbeau
0d2fce0146 disable COUNTER25 heartbeat, remove superfluous state in the FSM (detecting ACK is handled by a variable instead) 2020-12-15 06:23:14 -05:00
Romain Dolbeau
b39f32afb7 finish rename 2020-12-14 13:30:32 +01:00
Romain Dolbeau
f8e6de242b fix names, add new picture 2020-12-14 13:29:00 +01:00
Romain Dolbeau
04a01f564c Update README.md 2020-12-14 12:57:00 +01:00
Romain Dolbeau
0d2f75c7a6 Add write() support for I, much faster than going through ioctl 16 bytes at a time... 2020-12-13 18:17:59 +01:00
Romain Dolbeau
9ca5941af3 using 8 bytes functions seems a bit faster overall (but the host still use 32 bits transfers) 2020-12-13 17:25:50 +01:00
Romain Dolbeau
d88542aa5a Update README.md 2020-12-13 15:13:23 +01:00
Romain Dolbeau
6e4e7363e0 Update README.md 2020-12-13 15:11:10 +01:00
Romain Dolbeau
942b1d558e move/update README 2020-12-13 15:08:38 +01:00
Romain Dolbeau
572c785840 NetBSD test code for prototype driver 2020-12-13 15:05:02 +01:00
Romain Dolbeau
292ac54e7f NetBSD prototype driver 2020-12-13 15:04:11 +01:00
Romain Dolbeau
a1dcf5ee91 Pictures 2020-12-13 15:00:36 +01:00
Romain Dolbeau
e105dcb274 Add the sbus-to-zex gateware 2020-12-13 14:58:52 +01:00
Romain Dolbeau
322e8afc61 Add the sbus-to-zex adapter board 2020-12-13 14:57:19 +01:00
Romain Dolbeau
7192ebde36 Initial commit 2020-12-13 14:51:07 +01:00