- 99-retro-usb-permissions.rules renamed to 90-retro-usb-permissions.rules
- 91-retro-usb-latency.rules: udev rule to enforce low latency for FDTI USB UART
- 92-retro-usb-persistent.rules: udev rule for persistent device names
- Note:
- for all FTDI USB-UART it is essential to set them to `low latency` mode.
That was default for linux kernels 2.6.32 to 4.4.52. Since about March
2017 one gets kernels with 16 ms default latency again, thanks to
kernel patch 9589541. For newer systems it is essential to install the
udev rule which automatically sets low latency.
- Goals for rlink v4
- 16 bit addresses (instead of 8 bit)
- more robust encoding, support for error recovery at transport level
- add features to reduce round trips
- improved attention handling
- new 'list abort' command
- For further details see README_Rlink_V4.txt
- use own C++ based tcl shell tclshcpp instead of tclsh
- new reference system
- switched from ISE 13.3 to 14.7.
- map/par behaviour changed, unfortunately unfavorably for w11a.
On Nexys3 no timing closure anymore for 80 MHz, only 72 MHz can
be achieved now.
- new man pages (in doc/man/man1/)
- support for Spartan-6 CMTs in PLL and DCM mode
- Added simple simulation model of Cypress FX2 and test benches for
functional verifcation of FX2 controller
- Bugfixes in FX2 firmware and controller, works now also on Nexys3 & Atlys
- Added test systems for rlink over USB verification for Nexys3 & Atlys
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !!