This is a stub for device 574, which is a 12-bit A/D converter with
128 channels. There was only one, attached to the MIT AI lab PDP-10.
It's documented in ITS hardware memo #4.
This implementation deals with CONO and CONI bits, and accepts a
channel number written with DATAO. However, the data returned by
DATAI is always 2048. The programmed data rate is ignored and data is
always available immediately. It will not generate interrupts.
Cleanup for compile without ITS or BBN options.
Cleanup of interrupt handling.
Floating point code now passes random instruction tests with
minor off by +/-1 in lower half of long add/subtract instructions.
RP10 proper handling of not ready flag.
RP10 no seek interrupts while read/write to other drive.
TM10 Clean up off by one bits in upper status.
TM10 Added MT_LASTWD flag to indicate read of last word.
TM10 Proper handling of Record length error.
TM10 Added EOR flag.
TM10 Rewind at BOT now Illegal operation.
TM10A return channel flags as 1 rather then 0.
RH10/disk Handle reset CONO flag.
RH10/disk Generate parity on register read.
RH10/disk No registers can be modified other then attention when
one drive is doing read/write operation.
RH10/disk write register 0 without GO update command.
RH10/disk command to unready drive return RMR error.
RH10/disk Search/seek to invalid CHS returns immediate error.
RH10/RP06 write to error 2 and 3 registers work.
RH10/disk no seek interrupts set when other drive read/write.
Added BBN Pager support
Clean up instruction options table.
Removed some unneeded loads.
Removed unneeded FMB term.
Cleaned up interrupt handling to properly handle PIR events.
Moved dev_pi to be with rest of PI code.
Don't check APR interrupts unless pi system enabled.
CONO APR reset_all does not clear flags on KA10.
Clean up handling of PUBLIC/CONCEALED mode on KI10.
Clean up ITS pager support.
Added fetch flag to page_lookup for ITS/KI and BBN support.
Speed up LDB/DPB instructions to use bulk shift.
Carry 0&1 Flags are not cleared until JFCL instruction.
Fixed bug in LSHC with shift > 36 bits.
Fixed bug in JFCL when run from trap/uuo, bumped PC when it should not..
Shortened loop for BLKI/BLKO instructions.
Mask AR & MQ to FMASK before save in one place.
