AZBevier
b6523197ef
SEL32: Add CSW (console switches) and BOOTR (boot regs) variables.
...
SEL32: Fix sel32_clk.c coding error in interval timer code.
SEL32: Update to latest makecode.c utility and add makefile.
SEL32: Update diag.ini file to show how to set boot regs and CSW values.
2019-09-01 16:37:26 -07:00
AZBevier
0c3385304d
SIM32: Change instruction processing based on Gould diags.
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SIM32: Add more changes for UTX install tape processing.
2019-08-09 19:17:55 -07:00
AZBevier
caa3398164
SEL32: Correct opcode processing errors caught by Gould diagnostics.
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SEL32: Do some code cleanup.
2019-08-04 10:50:01 -07:00
AZBevier
53026c66c3
SEL32: Add three missing basemode instructions.
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SEL32: Handle multiple EOFs on MT.
SEL32: Correct basemode instruction processing and display errors.
SEL32:Fix ex -m to display basemode instructions.
2019-07-25 12:58:19 -07:00
AZBevier
79eff596c9
SEL32: Correct test code for indirect branches that was missing an &.
2019-07-19 12:36:22 -07:00
AZBevier
90939994bf
SEL32: Correct basemode instruction decoding for several instructions.
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SEL32: Remode unused debug code.
2019-07-18 17:26:40 -07:00
James C. Bevier
b6e8143f7a
SEL32: Start base register instruction tests.
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Correct some basemode instructions.
Change boot processing code.
2019-07-17 21:39:18 -04:00
James C. Bevier
007a95a532
SEL32: Fix several instruction errors detected by Level 1 Diags.
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Fix Arithmetic Exception Error handling.
2019-07-17 21:39:18 -04:00
James C. Bevier
ac6f95d246
SEL32: Fix set/sho history. Fix examine/deposit.
2019-07-17 21:39:18 -04:00
James C. Bevier
4eacef155a
SEL32: Correct lea * instruction and eom? instruction
2019-07-17 21:39:18 -04:00
James C. Bevier
1dfd36c74a
SEL32: Add excess 64 floating point support to cpu instruction set.
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Add sel32_fltpt.c subroutine set that handles 32/64 bit floating point
arithmetic. Also float/fix conversions.
2019-07-17 21:39:18 -04:00
James C. Bevier
c824c6e985
SEL32: Do code cleanup of instruction decoding
2019-07-17 21:39:18 -04:00
James C. Bevier
d5899f1dd5
SEL32: Correct mapping code to fix sysgen error.
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Fix BU *1,1 condition code error Fix EXM to correct l/r h/w detection code
2019-07-17 21:39:18 -04:00
James C. Bevier
d9283178d9
SEL32: Reformat files to use DOS format and no tabbing
2019-07-17 21:39:18 -04:00
James C. Bevier
d3d4e808cc
SEL32: Initial commit of working simulator.
2019-07-17 21:39:18 -04:00
Richard Cornwell
c27809c194
SEL32: Added test cases, more devices.
2019-07-17 21:39:18 -04:00
Richard Cornwell
66f4cc4c83
SEL32: More instructions.
2019-07-17 21:39:18 -04:00
Richard Cornwell
5decc40fa5
SEL32: Initial commit.
2019-07-17 21:39:18 -04:00
