emulator seg fault after LPSW near label RXM in CPUT4.
CPUT4 activates Ring 3 by loading the ring bits of the program
counter. However, it does not enable segmentation, so we're still
accessing memory by physical location - no address mapping occurs.
mapva used the entire 32-bit program counter as an offset in the MEM
array (physical memory), and because of the ring bits, this caused a
Unix seg fault.
mapva was changed to only use 28 bits of the address when VA mapping
is disabled (28 bits matches the size of the MEM array). Technically,
a more accurate mask should be applied based on the CPU model. For
example, a P750 could only access 8MB of memory.
This is an unsigned int, so will overflow after 4B instructions, but
it's impractical to trace that many instructions anyway. This feature
is used for debugging the emulator, getting diags to work, etc., so
instruction counts tend to be low.
NOTE: ea would only be set for mem. ref. instructions, but we use the
same code at label d_uii: for generics too. Not sure what the ea should
be for a generic UII fault where there is no ea computed.
don't load registers and keys from the runfile unless the 'regs'
option is used. Old T&M's were normally loaded into memory, followed
by a master clear, then run. The Prime runfiles on disk (at rev 18)
had the wrong mode in the key field of the rvec file header, so the
test did not execute properly. Also expanded the boot help for data
switches.
test how magrst behaves. It treats this just like a real tape error,
which is good. If mtwrite is used to re-create a physical tape from a
.tap file, it cannot re-create tape errors, so writes a 4-byte zero
record instead. Prime magrst will still see this as an error record
since it isn't long enough to be a real magsav record.
add DNS lookup on every license server connect to handle dynamic IP
made keyboard chars ^O, ^Y, and ^V work on system console
added printf in fatal() if any messages were logged to error.log
supports ^b in Primos II to reboot from tape w/Primos II in memory
to allow running make rev 19 from Primos II, but it's still broken
fixed cylinder limits for some disk models (couldn't format some drive types)
fixed devdisk problem: a error on one unit could cause bogus errors on another
IMPORTANT: fixed rare bug where emulator would hang in sleep (IMPS=0)
added licensing dongle support
boot option supports filename, sense and data switches:
-boot filename sswitch dswitch (for D. Boone)
-ds option (like VCP) as alternate way to set data switches (for D. Boone)
removed -v and -vv: they were old and didn't do anything
tries to read ring0.map and ring3.map if no -map option used
fixed bug with new connect for multiple AMLC controllers
default build is now for 32 amlc lines
fixed disk geometry for CMD; added geometry for Model 4935 (1.1G NEC)
fixed tape boot for variable record sizes (for D. Boone), but rev 19 loops
added EMULATOR_VERSION #define and version printf()
changed tape drive filenames from dev14u0-4 to mt0-4
changed disk drive filenames from dev26u0 to disk26u0
added license manager tracing
changed to automatically redirect stderr to error.log on startup
changed to create mtx tape drive files if they don't exist
tested write-protected tape drive files
changed invalid seek from a fatal error (emulator halt) to a disk error
disable Nagle algorithm for telnet connections (OSX buggy delay)
error setting terminfo flags for USB serial devices is no longer fatal
changed "pio to unimplemented device" from error to trace
changes for hobby version (no amlc, one disk drive)
new files geom.h, geomhash.h, geomhash.c for hobby version
added checksum to disk geometry tables to thwart hacking hobby version
added head offset check to disk driver for hobby version
added -boot help to display help with booting
added initial support for Matrixlock dongle
emulator handles xon/xoff on console to avoid blocking
supports read-only tape files (Unix read-only mode)
changed clock catch-up code (slower) so rev 20 doesn't crash after suspend
changed disk driver to controller 0-7 instead of device 0-64
demand-based variable interrupt rate for amlc controllers
fixed devdisk error reading zero bytes past disk eof (for D. Boone)
devdisk sets read check status bit on Unix read error
added INA '1114 for cpboot (for D. Boone)
changed SETCC_16/32, tcr, tch for speed, checked with Shark
support for real serial ports
added "amlc" config file to tie specific amlc lines to serial ports
changed amlc context to controller 0-7 rather than device 0-64
use lword bit 7 to enable hardware flow control: 2413 -> 3413
poll amlc faster if dmq buffer full (output), but don't do this for
input because user input buffer might overflow
-- this was causing the LISTENER_ORDER$ signals after DIAG
-- also was causing HELP to fail sporadically (HELP MTRESUME)
removed TB_xxx flags (identical to T_xxx)
added some eap hints
changed to pop the concealed stack earlier
changed LDLR/LDAR to load result from RP if ea is 7
changed STLR/STAR to store result in RP if ea is 7
added new trace flags for GET/PUT (unimplemented)
reworked ring/register fix so that Primos nevers sees RP faulted
but we don't have to do extra tests in the fetch loop
changed EAxxx routines to use RP segno when EA = register
added FP exception fault to ieeepr8 and all FP routines
added round flag to ieeepr8 (though not sure it's rounding correctly)
used gcov info to reorder some stuff in ea16s, ea32s, ea32r64r
changed warn() and fatal() to use get16t; prevpc might be a register
IMPORTANT NOTE: to compile with -O0, also use -DNOREG (gcc bug)
changed ARGT to add ring bits to LB & SB in brsave[]
major TRACE update, to debug Information tsrc$$ problem
changed MAXMB default for non-OSX platforms (PS3) to 32MB
changed B(I,D)(X,Y) instructions to increment/decrement inside if;
(avoids reloading values to test them) and removed B(X,Y)NE macros
changed default cpuid to 15 so real time clock is always set
use ppa instead of ppn to avoid << 10 on every memory reference
changed newkeys() so illegal keys give illegal instruction vs fatal()
removed hack to patch Primos for rev 23 SSSN check
added code to SSSN to skip the check loop immediately following
removed #ifdef FAST from a few places, just use the faster code
added code to LDA trace to also display as two octal bytes
changed EXPCL macro to set and clear bits - not just set
changed shift instructions - made CLEARCL conditional; this
means keys are only updated once per shift, not twice
fixed prtn to update stack free pointer after values fetched
in case a fault occurs and prtn is restarted
changed prtn to invalidate brp cache only if ring changes
changed prtn to inline, to avoid register save/restore
changed argt to only update rp word offset in sf header
added hack to pcl to correct wrapped RP for cpu.pcl case 42
added cgt inline proc, used in 2 places; generates better code
(store to utempa is avoided altogether)
added pimh (also used for pima) inline proc to avoid stores
inlined invalidate_brp
changed add16 implementation while looking at code generated
ran faster according to Jeff's timers: 59/52 for old/new
changed get/put(16,32)r to check for ring change and use regular
get/put call if possible, so brp supercache can be used
FUTURE: could add separate brp cache entry for R0 accesses
changed ea32r64r live register test so normal path is first
changed ea64v live register test so normal path is first
change ea32i to use INCRP macro instead of RPL++
removed need for duplicated memcpy in pcl() (copying ecb)
inlined pclea for speed
FUTURE: would be nice to inline complex pcl/argt, but it's called
by CALF and ARGT instructions
added 2 new rbp entries for FAR0/1; used in ldc/stc
changed IMA and IRS back to use get/put16t to make use of
supercache instead of always doing 1 mapva
changed apea() to use brp[RPBR] for AP fetch, UNBR for indirect
added -DNOMEM to remove -mem command option and testing
fixed bug in STTM causing sporadic CPU times (negative deltas)
added get32m & put32m: these always map
changed get32 and put32 to be inlined
changed mem[] references to MEM[] to allow experiments
tried using register for MEM pointer - not so great
tried using register for instcount - screwed up (very sluggish)
Change tracing to show when supercache is used
Symbolic names for supercache entries
Added supercache entries for sector 0 and PB (different from RP)
Add invalidate_brp to invalidate supercache
Separate get16trap (WILL trap) from get16t (MIGHT trap)
Use supercache in get32 and various get/put routines
