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mirror of https://github.com/rcornwell/sims.git synced 2026-02-03 07:11:02 +00:00
Commit Graph

88 Commits

Author SHA1 Message Date
AZBevier
c715d5de08 SEL32: Correct support for multiple disk drives for UTX. 2020-03-12 23:32:03 -04:00
Richard Cornwell
5a27d75811 SEL32: Cleanup memory sizing. 2020-03-12 00:02:05 -04:00
AZBevier
560ca4dfb9 SEL32: revise cpu_set_size function. 2020-03-11 15:23:55 -07:00
AZBevier
18eb91cd6d SEL32: Correct interrupt processing during blocked mode.
SEL32: Coverity errors.
SEL32: Change UDP/DPII support.
2020-03-09 19:47:47 -07:00
Richard Cornwell
2330a094c7 SEL32: Cleanup coverity error. 2020-03-08 23:40:22 -04:00
Richard Cornwell
1d092eb60b SEL32: Cleanup various coverity errors. 2020-03-08 21:22:33 -04:00
AZBevier
d198882980 SEL32: Correct real time clock interrupt processing.
SEL32: start code cleanup.
SEL32: add mfp and mfp scsi disk intitial support code.
SEL32: add new files sel32_mfp.c and sel32_scsi.c to makefile.
SEL32: modify sel32_mt.c code to define tape as BTP for UTX.
2020-03-06 21:41:59 -07:00
AZBevier
454bc6feb3 SEL32: Change DPII disk initialization for UTX umap data.
SEL32: Adjust console timing.
SEL32: Revise HIO support code.
2020-02-29 15:47:40 -07:00
Richard Cornwell
b159c1d487 SEL32: Fixed diagnostics test to exit properly when done. 2020-02-17 20:09:01 -05:00
AZBevier
7e3d17ef2c SEL32: Update console device to pass SEL diags.
SEL32: Update disk devices to hold current STAR in UNIT structure.
SEL32: Add new disk geometry macros.
SEL32: Revise disk formatting support for UTX.
SEL32: Revise INCH command support for all devices.
2020-02-17 12:45:22 -07:00
AZBevier
18215f0e73 SEL32: Allow channel address reconfiguration.
SEL32: Add disk definitions for UTX and MPX.
SEL32: Add disk initialization for UTX and MPX HSDP & DISK controllers.
SEL32: Add read/write track/sector label simulation for UTX & MPX.
SEL32: Create revised initialization test files for SIMH.
2020-02-04 18:16:35 -07:00
Richard Cornwell
31f0199197 SEL32: Fixed compile warning for Windows. 2020-01-23 11:11:28 -05:00
AZBevier
f7060f7dfb SEL32: Correct HIO instruction for UTX console. Add correct trapstatus bits. 2020-01-20 13:49:54 -05:00
AZBevier
1a2eefec9d SEL32: Add more UTX support for V6 & V9 processors.
SEL32: Fix ADFD, SUFD, MPFD, DVFD instructions display.
SEL32: Change console output to handle 8 bit parity for UTX.
SEL32: Correct RPSWT instruction for V9 processor.
SEL32: Reverse scan order of channel complete and interrupts.
SEL32: Move memory and map register r/w macros to sel32_defs.h.
2020-01-11 13:55:02 -07:00
AZBevier
6ed7b3add1 SEL32: Continue adding changes to support SEL diagnostics.
SEL32: Change code to correctly detect interrupt level for RT clock.
SEL32: Add debug support for interval timer and RT clock.
SEL32: Change auto diag command file to not run unsupport device diags.
2019-12-31 14:17:51 -07:00
AZBevier
4c012098ef SEL32: Rewrite mapping and address translation software. 2019-12-18 20:56:01 -07:00
Richard Cornwell
bcccbbf38a SEL32: Fixed compile error. 2019-12-07 23:47:02 -05:00
AZBevier
f4dc60bd69 SEL32: Updates for SEL Diags and UTX support. 2019-12-07 20:59:51 -07:00
AZBevier
987f9e3e1e SEL32: Correct Windows and coverity detected warnings. Add diagcopy.c. 2019-11-05 17:23:52 -07:00
Richard Cornwell
6e706abbdd SEL32: Fixed compile warnings. 2019-11-03 13:33:44 -05:00
AZBevier
66f49759a2 SEL32: Add changes to support SEL diagnostics. 2019-11-01 20:52:17 -07:00
AZBevier
59389d429e SEL32: Changes to support diagnostic differences for all CPU's/ 2019-10-18 20:05:09 -07:00
Richard Cornwell
d5aa4a5781 SEL32: Fixed typos. 2019-10-05 14:48:36 -04:00
AZBevier
8ff8b7a1b7 SEL32: Change diagnostic output to fixed fields.
SEL32: Add changes to instruction processing to pass more SEL32 diagnostics.
2019-10-04 18:54:48 -07:00
Richard Cornwell
abaeb33a2f SEL32: Fixed typo. 2019-09-19 19:49:48 -04:00
AZBevier
c5b3e17c43 SEL32: Change print fields in debug statements to fixed length. 2019-09-19 11:27:53 -07:00
AZBevier
55bbf0d915 SEL32: Add fixes for diagnostic detected errors. Fix coverity errors. 2019-09-17 15:13:00 -07:00
Richard Cornwell
d14e28df58 SEL32: Minor cleanup on sel32_disk.c to remove data structure. 2019-09-15 14:34:23 -04:00
AZBevier
b6523197ef SEL32: Add CSW (console switches) and BOOTR (boot regs) variables.
SEL32: Fix sel32_clk.c coding error in interval timer code.
SEL32: Update to latest makecode.c utility and add makefile.
SEL32: Update diag.ini file to show how to set boot regs and CSW values.
2019-09-01 16:37:26 -07:00
AZBevier
2c1357fc92 Merge https://github.com/rcornwell/sims 2019-08-09 19:27:05 -07:00
AZBevier
0c3385304d SIM32: Change instruction processing based on Gould diags.
SIM32: Add more changes for UTX install tape processing.
2019-08-09 19:17:55 -07:00
Richard Cornwell
57df5a0ecc SEL32: Added auto diagnostics run to build. 2019-08-04 15:23:58 -04:00
AZBevier
caa3398164 SEL32: Correct opcode processing errors caught by Gould diagnostics.
SEL32: Do some code cleanup.
2019-08-04 10:50:01 -07:00
Richard Cornwell
598356c5ad SEL32: More code cleanup. 2019-08-03 13:55:56 -04:00
AZBevier
53026c66c3 SEL32: Add three missing basemode instructions.
SEL32: Handle multiple EOFs on MT.
SEL32: Correct basemode instruction processing and display errors.
SEL32:Fix ex -m to display basemode instructions.
2019-07-25 12:58:19 -07:00
Richard Cornwell
237a87df8b SEL32: Cleanup magtape controller. 2019-07-23 20:38:01 -04:00
Richard Cornwell
84fe5127a0 SEL32: Added tape tools. 2019-07-23 20:37:41 -04:00
AZBevier
79eff596c9 SEL32: Correct test code for indirect branches that was missing an &. 2019-07-19 12:36:22 -07:00
AZBevier
a3359d9a23 SEL32: Update diag initialization file for testing. 2019-07-19 12:31:48 -07:00
AZBevier
5cf0ee326b SEL32: Add channel INCH support code. 2019-07-18 17:39:03 -07:00
AZBevier
f89e8aefa8 SEL32: Fix basemode instruction display code. 2019-07-18 17:28:43 -07:00
AZBevier
3ed0c046e8 SEL32: Remove unused debug code. 2019-07-18 17:28:06 -07:00
AZBevier
90939994bf SEL32: Correct basemode instruction decoding for several instructions.
SEL32: Remode unused debug code.
2019-07-18 17:26:40 -07:00
AZBevier
a928745c55 SEL32: Change INCH/NOP command handling for UTX.
SEL32: Remove unused debug code.
2019-07-18 17:23:39 -07:00
AZBevier
c7af4f15a4 SEL32: Change clock initialization call.
SEL32: Remove unused pld debug code.
2019-07-18 17:17:35 -07:00
AZBevier
60e649de5a SEL32: Change support of INCH command to always generate interrupt.
SEL32: Remove unused debug code.
2019-07-18 17:15:48 -07:00
Richard Cornwell
8813d7da0c SEL32: Adding in diagnostic tape image. 2019-07-17 21:39:18 -04:00
James C. Bevier
d3f33f8d8e SEL32: Change instruction display. 2019-07-17 21:39:18 -04:00
James C. Bevier
3dae6f7939 SEL32: Correct rewind processing code. 2019-07-17 21:39:18 -04:00
James C. Bevier
b6e8143f7a SEL32: Start base register instruction tests.
Correct some basemode instructions.
Change boot processing code.
2019-07-17 21:39:18 -04:00