AZBevier
7e3d17ef2c
SEL32: Update console device to pass SEL diags.
...
SEL32: Update disk devices to hold current STAR in UNIT structure.
SEL32: Add new disk geometry macros.
SEL32: Revise disk formatting support for UTX.
SEL32: Revise INCH command support for all devices.
2020-02-17 12:45:22 -07:00
AZBevier
18215f0e73
SEL32: Allow channel address reconfiguration.
...
SEL32: Add disk definitions for UTX and MPX.
SEL32: Add disk initialization for UTX and MPX HSDP & DISK controllers.
SEL32: Add read/write track/sector label simulation for UTX & MPX.
SEL32: Create revised initialization test files for SIMH.
2020-02-04 18:16:35 -07:00
AZBevier
f7060f7dfb
SEL32: Correct HIO instruction for UTX console. Add correct trapstatus bits.
2020-01-20 13:49:54 -05:00
AZBevier
1a2eefec9d
SEL32: Add more UTX support for V6 & V9 processors.
...
SEL32: Fix ADFD, SUFD, MPFD, DVFD instructions display.
SEL32: Change console output to handle 8 bit parity for UTX.
SEL32: Correct RPSWT instruction for V9 processor.
SEL32: Reverse scan order of channel complete and interrupts.
SEL32: Move memory and map register r/w macros to sel32_defs.h.
2020-01-11 13:55:02 -07:00
AZBevier
6ed7b3add1
SEL32: Continue adding changes to support SEL diagnostics.
...
SEL32: Change code to correctly detect interrupt level for RT clock.
SEL32: Add debug support for interval timer and RT clock.
SEL32: Change auto diag command file to not run unsupport device diags.
2019-12-31 14:17:51 -07:00
AZBevier
4c012098ef
SEL32: Rewrite mapping and address translation software.
2019-12-18 20:56:01 -07:00
Richard Cornwell
bcccbbf38a
SEL32: Fixed compile error.
2019-12-07 23:47:02 -05:00
AZBevier
f4dc60bd69
SEL32: Updates for SEL Diags and UTX support.
2019-12-07 20:59:51 -07:00
AZBevier
987f9e3e1e
SEL32: Correct Windows and coverity detected warnings. Add diagcopy.c.
2019-11-05 17:23:52 -07:00
AZBevier
66f49759a2
SEL32: Add changes to support SEL diagnostics.
2019-11-01 20:52:17 -07:00
AZBevier
59389d429e
SEL32: Changes to support diagnostic differences for all CPU's/
2019-10-18 20:05:09 -07:00
AZBevier
8ff8b7a1b7
SEL32: Change diagnostic output to fixed fields.
...
SEL32: Add changes to instruction processing to pass more SEL32 diagnostics.
2019-10-04 18:54:48 -07:00
AZBevier
c5b3e17c43
SEL32: Change print fields in debug statements to fixed length.
2019-09-19 11:27:53 -07:00
AZBevier
55bbf0d915
SEL32: Add fixes for diagnostic detected errors. Fix coverity errors.
2019-09-17 15:13:00 -07:00
AZBevier
b6523197ef
SEL32: Add CSW (console switches) and BOOTR (boot regs) variables.
...
SEL32: Fix sel32_clk.c coding error in interval timer code.
SEL32: Update to latest makecode.c utility and add makefile.
SEL32: Update diag.ini file to show how to set boot regs and CSW values.
2019-09-01 16:37:26 -07:00
AZBevier
0c3385304d
SIM32: Change instruction processing based on Gould diags.
...
SIM32: Add more changes for UTX install tape processing.
2019-08-09 19:17:55 -07:00
AZBevier
caa3398164
SEL32: Correct opcode processing errors caught by Gould diagnostics.
...
SEL32: Do some code cleanup.
2019-08-04 10:50:01 -07:00
AZBevier
53026c66c3
SEL32: Add three missing basemode instructions.
...
SEL32: Handle multiple EOFs on MT.
SEL32: Correct basemode instruction processing and display errors.
SEL32:Fix ex -m to display basemode instructions.
2019-07-25 12:58:19 -07:00
AZBevier
79eff596c9
SEL32: Correct test code for indirect branches that was missing an &.
2019-07-19 12:36:22 -07:00
AZBevier
90939994bf
SEL32: Correct basemode instruction decoding for several instructions.
...
SEL32: Remode unused debug code.
2019-07-18 17:26:40 -07:00
James C. Bevier
b6e8143f7a
SEL32: Start base register instruction tests.
...
Correct some basemode instructions.
Change boot processing code.
2019-07-17 21:39:18 -04:00
James C. Bevier
007a95a532
SEL32: Fix several instruction errors detected by Level 1 Diags.
...
Fix Arithmetic Exception Error handling.
2019-07-17 21:39:18 -04:00
James C. Bevier
ac6f95d246
SEL32: Fix set/sho history. Fix examine/deposit.
2019-07-17 21:39:18 -04:00
James C. Bevier
4eacef155a
SEL32: Correct lea * instruction and eom? instruction
2019-07-17 21:39:18 -04:00
James C. Bevier
1dfd36c74a
SEL32: Add excess 64 floating point support to cpu instruction set.
...
Add sel32_fltpt.c subroutine set that handles 32/64 bit floating point
arithmetic. Also float/fix conversions.
2019-07-17 21:39:18 -04:00
James C. Bevier
c824c6e985
SEL32: Do code cleanup of instruction decoding
2019-07-17 21:39:18 -04:00
James C. Bevier
d5899f1dd5
SEL32: Correct mapping code to fix sysgen error.
...
Fix BU *1,1 condition code error Fix EXM to correct l/r h/w detection code
2019-07-17 21:39:18 -04:00
James C. Bevier
d9283178d9
SEL32: Reformat files to use DOS format and no tabbing
2019-07-17 21:39:18 -04:00
James C. Bevier
d3d4e808cc
SEL32: Initial commit of working simulator.
2019-07-17 21:39:18 -04:00
Richard Cornwell
c27809c194
SEL32: Added test cases, more devices.
2019-07-17 21:39:18 -04:00
Richard Cornwell
66f4cc4c83
SEL32: More instructions.
2019-07-17 21:39:18 -04:00
Richard Cornwell
5decc40fa5
SEL32: Initial commit.
2019-07-17 21:39:18 -04:00
