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28 Commits

Author SHA1 Message Date
wfjm
f25da67b91 docu updates; vmfset for Vivado 2020.1 [skip ci] 
- doc/CHANGELOG: fix user-contest label case issue (must be lower case)
- tools/oskit/*/README.md: clarify 211bsd patch level
- **/*.vmfset: now matching Vivado 2020.1
 2022-04-24 11:55:40 +02:00
wfjm
78bb3a4a83 fixes for ghdl V0.36 -Whide warnings 2019-08-21 12:04:09 +02:00
wfjm
0269006dc8 docu updates [skip ci] 2019-08-11 09:50:44 +02:00
wfjm
563e230a6a get Nexys A7 working and integrated 
- rtl/bplib
  - arty/migui_arty_gsim.vhd: cosmetics
  - nexys4d/mig_a.prj: BUGFIX: SysResetPolarity ACTIVE HIGH; InputClk 100 MHz
  - nexys4d/migui_nexys4d_gsim.vhd: cosmetics
- rtl/sys_gen
  - tst_mig/nexys4d/sys_tst_mig_n4d: use 100 MHz MIG SYS_CLK; add clock monitor
  - tst_sram/nexys4d/sys_tst_sram_n4d: use 100 MHz MIG SYS_CLK
  - w11a/nexys4d/sys_w11a_n4d: use 100 MHz MIG SYS_CLK
  - */nexys4*/tb/tbrun.yml: drop n4 from, add n4d to default
- tools/exptest/sys
  - sys_w11a_arty_setup.tcl: add missing memsize definition
  - sys_w11a_{br_arty,br_n4d,n4d}_setup.tcl: added
 2019-08-10 19:03:47 +02:00
wfjm
7cccce5a51 rtl/sys_gen: add READMEs 2019-08-10 08:30:29 +02:00
wfjm
9f35e4863c SPDX: tb/*/tb_*.dat ect 2019-07-26 18:04:45 +02:00
wfjm
d3cce101a7 SPDX: rtl/*/*.vhd 2019-07-12 19:01:49 +02:00
wfjm
3c92b79224 SPDX: Makefile(.ise) 2019-07-05 17:23:39 +02:00
wfjm
913fe9b399 update message filters 
- vmfset: now tested for viv 2017.2 and 2018.3
- imfset: now tested for ISE 14.7
 2019-02-15 18:44:55 +01:00
wfjm
80fbad98c6 add resource lines for viv 2017.2 and 2018.3 2019-02-10 09:04:52 +01:00
wfjm
b8dfa6d41e get ready for w11a_V0.753 release 
- rtl/sys_gen/*/*.vhd: drop superfluous genlib call
- rtl/sys_gen/*/*.vmfset: accomodate recent code changes
- tools/bin/tbrun: show correct 'found count' in summary message
- tools/dox/*.Doxyfile: push version to 0.753
- tools/src/librtools/Rtime.ipp: change list-init make some gcc happy
 2018-12-29 14:14:08 +01:00
wfjm
674762d6d8 consolidate clock generation in 7-Series designs 
- s7_cmt_1ce1ce: add clock generator block used in many 7-Series designs
- sys_gen/*/*: use s7_cmt_1ce1ce in 7-Series designs
- tbcore_rlink: wait 40 cycles after CONF_DONE
- serport_master_tb: add 100 ps RXSD,TXSD delay to allow clock jitter
 2018-12-21 09:06:16 +01:00
wfjm
22bb8e011c reorganize dcm/mmcm/ppl sim models 
- sfs_gsim_core: new common simulation core
- {dcm,s6_cmt,s7_cmt}_sfs_gsim: use now sfs_gsim_core
- s7_cmt_sfs_tb: removed, use now sfs_gsim_core
- rtl/bplib/*/tb/tb_*: use now sfs_gsim_core
- tst_serloop/nexys*/tb/tb_tst_serloop*_n*: use now sfs_gsim_core
 2018-11-09 17:48:56 +01:00
wfjm
ac16d6d27e *.vmfset: update rules to cover 2017.4-2018.2 2018-08-24 20:52:21 +02:00
wfjm
dfa2a91a18 get disclaimers in line with GPL V3 License.txt 2018-01-02 21:57:40 +01:00
wfjm
62eb016ec2 add missing file; minor updates 2017-07-01 13:42:40 +02:00
wfjm
211e1f3ff3 get vivado 2017.1 ready 
- xviv_msg_filter: add version-range tag support
- *.vmfset:
  - drop the nonsense 'Synth 8-6014' messages
  - adopt to different path used by 'Synth 8-3332' messages
 2017-06-10 11:36:32 +02:00
Walter F.J. Mueller
3d3035eb96 correct spelling 2017-04-30 15:33:23 +02:00
Walter F.J. Mueller
0e96fa106b added preliminary and FPFA untested(!) support for nexys4 DDR board 
- rtl/bplib/nexys4d: added board support
- rtl/sys_gen
  - tst_rlink/nexys4d: rlink tester design
  - tst_serloop/nexys4d: serial port tester design
  - tst_snhumanio/nexys4d: human IO tester design
  - w11a/nexys4d_bram: w11 design using BRAM only
 2017-01-04 22:12:29 +01:00
Walter F.J. Mueller
238b6e4276 rename .cvsignore -> .gitignore 2016-12-17 16:28:37 +01:00
Walter F.J. Mueller
5983b0bb2a - upgraded CRAM controller, now with 'page mode' support 
- new test bench driver tbrun, give automatized test bench execution
 2016-10-15 07:42:21 +00:00
Walter F.J. Mueller
2b5cfb7d96 - Code base cleaned-up for vivado, fsm now inferred 
- xsim support complete (but many issues to be resolved yet)
- Added configurable w11a cache
- Removed some never documented and now strategically obsolete designs
 2016-06-26 16:02:42 +00:00
Walter F.J. Mueller
e1479d4e5d - Add Arty support (BRAM only) 
- Add sysmon/xadc support (for nexys4,basys3,arty designs)
- Add Vivado simulator support (DPI not yet working)
 2016-03-19 15:45:59 +00:00
Walter F.J. Mueller
e91847f8db - added support for Vivado 
- added support for Nexys4 and Basys3 boards
- added RL11 disk support
- lots of documentation updated
 2015-03-09 19:26:25 +00:00
Walter F.J. Mueller
d87ac86f53 - migrate to rlink protocol version 4 
- Goals for rlink v4
    - 16 bit addresses (instead of 8 bit)
    - more robust encoding, support for error recovery at transport level
    - add features to reduce round trips
      - improved attention handling
      - new 'list abort' command
  - For further details see README_Rlink_V4.txt
- use own C++ based tcl shell tclshcpp instead of tclsh
 2014-12-20 16:39:52 +00:00
Walter F.J. Mueller
99de9893cb - interim release w11a_V0.562 (untagged) 
- C++ and Tcl based backend server: many support classes for interfacing to 
  w11 system designs, and the associated Tcl bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler. 
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs
 2013-04-13 17:13:15 +00:00
Walter F.J. Mueller
cbd8ce3468 - interim release w11a_V0.56 (untagged) 
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
        in the file README_USB-VID-PID.txt. You'll be responsible for any
        misuse of the defaults provided with the project sources !!
 2013-01-02 21:06:53 +00:00
Walter F.J. Mueller
f6775f7d05 - interim release w11a_V0.55 (untagged) 
- added xon/xoff (software flow control) support to serport library
- added test systems for serport verification
- use new serport stack in sys_w11a_* and sys_tst_rlink_* systems
 2011-12-23 10:38:59 +00:00