Romain Dolbeau
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2cda6c49d6
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minor changes
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2021-10-31 19:58:19 +01:00 |
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Romain Dolbeau
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c20d1f321f
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smaller vex
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2021-10-31 19:57:39 +01:00 |
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Romain Dolbeau
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afdfe4a686
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support more Po2 FB sizes
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2021-10-30 12:51:02 +02:00 |
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Romain Dolbeau
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6f04a9bd73
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more configuratble blit rom
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2021-10-30 11:53:09 +02:00 |
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Romain Dolbeau
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417095d2c0
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extrac cycle to meet timings at 1920x1080@60 when using HW cursor
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2021-10-30 11:52:58 +02:00 |
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Romain Dolbeau
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f57a22e434
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add a (working this time) Dcache to Vex
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2021-10-30 11:52:01 +02:00 |
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Romain Dolbeau
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1344a2e7e7
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Font for the on-screen debug display
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2021-10-30 10:04:12 +02:00 |
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Romain Dolbeau
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a85542d029
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CG6 accel emulation (still slow)
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2021-10-30 10:03:11 +02:00 |
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Romain Dolbeau
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f5a1067806
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fix broken timeout, some (disabled, for testing) stat stuff
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2021-10-30 10:02:33 +02:00 |
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Romain Dolbeau
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06bff62901
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move the wishbone CDC locally ; speedgrade from part
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2021-10-30 10:01:26 +02:00 |
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Romain Dolbeau
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dea62d3d73
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trying to improve the timing in the vga_clk domain
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2021-10-24 20:02:59 +02:00 |
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Romain Dolbeau
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fa0387fe96
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trying to improve the cg accel stuff
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2021-10-24 20:02:34 +02:00 |
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Romain Dolbeau
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ee1e8d3450
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Dcache-less Vex
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2021-10-24 20:02:02 +02:00 |
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Romain Dolbeau
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5b8124b939
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proto CG6
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2021-10-15 22:38:27 +02:00 |
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Romain Dolbeau
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d552b1cd52
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Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
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2021-10-11 08:06:10 +02:00 |
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Romain Dolbeau
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8642dd8c40
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Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
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2021-10-11 08:05:26 +02:00 |
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Romain Dolbeau
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27a310fadf
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one more word of warning
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2021-10-11 08:05:15 +02:00 |
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Romain Dolbeau
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6c6cb87395
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WB FSM was broken (cmap to be tested still)
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2021-10-10 19:23:39 +02:00 |
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Romain Dolbeau
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3e95f078f5
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fix irq priority handling in ohci-sbus device
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2021-10-09 17:51:33 +02:00 |
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Romain Dolbeau
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232b7795cd
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Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
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2021-10-09 11:26:32 +02:00 |
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Romain Dolbeau
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bd992ad421
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add VGA222 Pmod
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2021-10-09 11:26:13 +02:00 |
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Romain Dolbeau
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e31ea588f1
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don't need the extra 256 KiB
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2021-10-09 11:19:47 +02:00 |
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Romain Dolbeau
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04612ea864
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add a known limitation
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2021-10-09 11:11:02 +02:00 |
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Romain Dolbeau
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f27c8d86f6
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README in Pictures
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2021-10-09 10:44:40 +02:00 |
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Romain Dolbeau
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018f271c67
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pictures of V1.2
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2021-10-09 10:40:38 +02:00 |
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Romain Dolbeau
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3afb728485
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update README to V1.2
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2021-10-09 10:39:51 +02:00 |
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Romain Dolbeau
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d417ba7206
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Merge branch 'v1_2' into main
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2021-10-09 10:26:03 +02:00 |
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Romain Dolbeau
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1c690cbd90
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Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
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2021-10-09 10:25:47 +02:00 |
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Romain Dolbeau
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0b3cd1bfb5
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Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
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2021-10-09 08:27:34 +02:00 |
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Romain Dolbeau
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93b69a4afb
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Merge branch 'v1_2' of github.com:rdolbeau/SBusFPGA into v1_2
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2021-10-09 08:09:24 +02:00 |
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Romain Dolbeau
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11cfd3ba40
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CG3 is usable as console and with X11, despite the ugly colors
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2021-10-08 20:37:32 +02:00 |
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Romain Dolbeau
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df7f1e819f
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init sdram in PROM
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2021-10-07 19:43:07 +02:00 |
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Romain Dolbeau
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455acac0c1
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start working on some form of how-to, improve backplate for V1.2
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2021-10-07 09:49:09 +02:00 |
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Romain Dolbeau
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0c8a06076e
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start working on some form of how-to
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2021-10-03 11:19:11 +02:00 |
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Romain Dolbeau
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1acb9a961e
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commit untested cg3 emulation
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2021-10-02 12:33:32 +02:00 |
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Romain Dolbeau
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07256fda8a
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update backplate to V1.2
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2021-10-02 07:53:10 +02:00 |
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Romain Dolbeau
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b228f00baa
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update backplate to V1.2
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2021-10-02 07:52:18 +02:00 |
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Romain Dolbeau
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f46337ac35
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forgotten to commit extension for V1.0 with fan carrier
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2021-10-01 13:30:14 +02:00 |
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Romain Dolbeau
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5982ff3ef0
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bring back add_usb locally
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2021-09-23 14:53:37 -04:00 |
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Romain Dolbeau
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918fe47747
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minor stuff
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2021-09-23 14:37:29 -04:00 |
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Romain Dolbeau
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ba734f0fa9
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more ocnfigurability
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2021-09-21 14:12:17 -04:00 |
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Romain Dolbeau
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4609e15dc6
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missing xdr+
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2021-09-20 13:55:00 -04:00 |
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Romain Dolbeau
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40e818c950
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version-specific proms
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2021-09-20 12:45:07 -04:00 |
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Romain Dolbeau
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6927ed4546
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More V1.X stuff, still need to modularize the PROM. Also, why irqs other than 3 fails in Migen in V1.2 ???
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2021-09-19 13:15:11 -04:00 |
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Romain Dolbeau
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fa2c511766
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more V1.0 to V1.2 update stuff
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2021-09-19 10:18:00 -04:00 |
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Romain Dolbeau
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34ed2b130a
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apply patch from betrusted-io/gateware commit 817e284a3d92037b8cb0686735578d2bb60853e9
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2021-09-07 05:11:28 -04:00 |
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Romain Dolbeau
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084d6ee3ca
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More prep; splits CSR includes per-device
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2021-09-06 12:21:54 -04:00 |
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Romain Dolbeau
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9e2a84d098
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more V1.2
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2021-09-06 09:43:16 -04:00 |
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Romain Dolbeau
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b40953b65c
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Loops are easier to read...
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2021-09-06 03:03:04 -04:00 |
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Romain Dolbeau
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e710b6b2ff
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option to disable upper lane in AES/GCM isntructions; disable them in the code
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2021-09-05 09:56:14 -04:00 |
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