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4e001adf8da1a35d0da86bc5d92bfb87f6f7bc33
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28 Commits

Author SHA1 Message Date
wfjm
37b2d63281 finalize IDEC and PERFEXT wiring 
- ibdr_maxisys: add IDEC port, connect to EXTEVT of KW11P
- sys_w11a_*.vhd: use DM_STAT_EXP; IDEC to maxisys; setup PERFEXT
- kw11p and dmpcnt now fully setup
 2018-10-14 15:02:45 +02:00
wfjm
3eedd7f5c8 comment&code cosmetics; minor changes 2018-10-14 14:57:39 +02:00
wfjm
ff7b4fad97 integrate KW11-P in all w11 designs 2018-09-15 17:27:46 +02:00
wfjm
17ede0047a add ibd_kw11p: KW11-P prog clock 2018-09-15 15:23:47 +02:00
wfjm
dfa2a91a18 get disclaimers in line with GPL V3 License.txt 2018-01-02 21:57:40 +01:00
wfjm
a9425599e7 Miscellaneous fixes and changes 
- ibdr_deuna: add logic to handle 'PDMD issued while busy'
- Rw11CntlDEUNA: adopt trace and statistics
- hook_ibmon_xua.tcl: use .imf,.ime
 2017-05-28 13:33:39 +02:00
Walter F.J. Mueller
b6e235e0fc implementation streamlined 2017-04-23 18:03:16 +02:00
Walter F.J. Mueller
d466304530 add DEUNA to all sys_w11a systems 
- add ibdr_deuna to maxisys
- setup sys_conf for all systems
 2017-04-17 21:02:38 +02:00
Walter F.J. Mueller
623639aa82 add DEUNA device (xu) for ibus 2017-04-17 20:56:28 +02:00
Walter F.J. Mueller
8e6d604de4 revise interface for ibd_ibmon and rbd_rbmon 
- use start,stop,suspend,resume functions; improved stop on wrap handling
  - add 'repeat collapse' logic (store only first and last of a sequence)
 2017-04-09 22:56:23 +02:00
Walter F.J. Mueller
a2264ab463 23 line interrupt mapper for full system configuration 2017-01-29 14:08:04 +01:00
Walter F.J. Mueller
5983b0bb2a - upgraded CRAM controller, now with 'page mode' support 
- new test bench driver tbrun, give automatized test bench execution
 2016-10-15 07:42:21 +00:00
Walter F.J. Mueller
2b5cfb7d96 - Code base cleaned-up for vivado, fsm now inferred 
- xsim support complete (but many issues to be resolved yet)
- Added configurable w11a cache
- Removed some never documented and now strategically obsolete designs
 2016-06-26 16:02:42 +00:00
Walter F.J. Mueller
e1479d4e5d - Add Arty support (BRAM only) 
- Add sysmon/xadc support (for nexys4,basys3,arty designs)
- Add Vivado simulator support (DPI not yet working)
 2016-03-19 15:45:59 +00:00
Walter F.J. Mueller
677773d123 - Add CPU debug and monitoring units (dmhbpt,dmscnt,dmcmon) 2015-12-30 20:21:18 +00:00
Walter F.J. Mueller
f514906fc3 - major release w11a_V0.70 (tagged) 
- changes from last minor release
  - rhrp and tm11 bug fixes
  - no major functionality added
 2015-06-21 16:06:49 +00:00
Walter F.J. Mueller
24fde41c6a - added TM11/TU10 tape support 2015-06-05 12:11:41 +00:00
Walter F.J. Mueller
4a032e9436 - added RH70/RP/RM big disk support 
- many cleanups
 2015-05-14 17:00:36 +00:00
Walter F.J. Mueller
e91847f8db - added support for Vivado 
- added support for Nexys4 and Basys3 boards
- added RL11 disk support
- lots of documentation updated
 2015-03-09 19:26:25 +00:00
Walter F.J. Mueller
093d540121 - The div instruction gave wrong results in some corner cases when either 
divisor or quotient were the largest negative integer (100000 or -32768).
  This is corrected now, for details see ECO-026-div.txt
- some minor updates and fixes to support scripts
- xtwi usage and XTWI_PATH setup explained in INSTALL.txt
 2014-08-10 14:32:48 +00:00
Walter F.J. Mueller
200ba69364 - interim release w11a_V0.58 (untagged) 
- C++ and Tcl based backend server now fully functional, supports with 
    DL11, RK11, LP11 and PC11 all devices available in w11a designs
- the old perl based backend server (pi_rri) is obsolete and removed
- operating system kits reorganized
 2013-05-12 19:15:30 +00:00
Walter F.J. Mueller
99de9893cb - interim release w11a_V0.562 (untagged) 
- C++ and Tcl based backend server: many support classes for interfacing to 
  w11 system designs, and the associated Tcl bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler. 
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs
 2013-04-13 17:13:15 +00:00
Walter F.J. Mueller
3f455d5236 - interim release w11a_V0.532 (untagged) 
- re-organize modules 'human I/O' interface on Digilent boards
- add test designs for 'human I/O' interface for atlys,nexys2, and s3board
- small updates in crc8 and dcm areas
- with one exception all vhdl sources use now numeric_std
 2011-11-20 12:31:43 +00:00
Walter F.J. Mueller
e15295649e - interim release w11a_V0.531 (untagged) 
- many small changes to prepare upcoming support for Spartan-6 and
  usage of Cypress FX2 USB interface on nexys2/3 and atlys boards
 2011-09-12 20:52:31 +00:00
Walter F.J. Mueller
c3d40ba4b9 - interim release w11a_V0.52 (untagged) 
- migrate to rbus protocol verion 3
  - reorganize rbus and rlink modules, many renames
 2011-01-02 13:39:34 +00:00
Walter F.J. Mueller
16ce5b2091 - interim release w11a_V0.51 (untagged) 
- migrate to ibus protocol verion 2
  - nexys2 systems now with DCM derived system clock supported
  - sys_w11a_n2 now runs with 58 MHz clksys
 2010-11-27 23:17:50 +00:00
Walter F.J. Mueller
6a9b05b201 additional documentation 2010-07-22 19:46:37 +00:00
Walter F.J. Mueller
3335c61549 initial source upload (no docs yet) 2010-07-09 18:14:38 +00:00