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Author SHA1 Message Date
Gyorgy Szombathelyi
db288bcdae Archie: don't consume new pixel data during hsync 
Fixes BIA bounce demo
 2019-10-22 19:57:08 +02:00
Gyorgy Szombathelyi
cb13fcef8d Archie: use 2 deterministic places for requesting new data in VIDC 2019-10-22 19:57:08 +02:00
Gyorgy Szombathelyi
ef4be11a52 Archie: vidc flybk should be active after the end of the display 
...until the first displayed one, according to the datasheet.

Fixes Elite in 15kHz
 2019-10-22 19:57:08 +02:00
gyurco
bb67e0f089 Merge pull request #123 from gyurco/master 
Archie SDRAM updates
 2019-10-21 20:13:02 +02:00
Gyorgy Szombathelyi
434ea845de Archie: transfer hsync to cpuclk domain for using in MEMC 2019-10-21 19:52:32 +02:00
Gyorgy Szombathelyi
40e8f7e844 Archie: re-use the already fetched burst 
As a primitive 128 bit cache
 2019-10-21 17:37:06 +02:00
Gyorgy Szombathelyi
1b4884aaa6 Archie: fix possible bug when wb_we change too soon after wb_ack 2019-10-21 12:09:42 +02:00
Gyorgy Szombathelyi
4716d75bf5 Archie: update SDRAM testbench 2019-10-21 12:08:30 +02:00
Gyorgy Szombathelyi
1a4cdecac7 Archie: 128 bit burst read for VIDC 2019-10-20 20:30:34 +02:00
Gyorgy Szombathelyi
54d155bcf0 Archie: use built-in SDRAM burst feature 2019-10-20 13:35:53 +02:00
Gyorgy Szombathelyi
966e01d66c Revert "Archie: 128bit SDRAM interface (by Sorgelig)" 
This reverts commit 375c423a85.
 2019-10-19 23:30:50 +02:00
Gyorgy Szombathelyi
39fafc65b8 Archie: replace vidc fifo with DCFIFO component to fix clock domain crossing issues 2019-10-19 17:17:17 +02:00
gyurco
53d8613015 Merge pull request #122 from gyurco/master 
Some Archie updates
 2019-10-18 22:17:28 +02:00
Gyorgy Szombathelyi
4a1a470d0e Archie: change video timing events to simple equality checks 
Display event registers less likely to glitch
 2019-10-18 21:57:11 +02:00
Gyorgy Szombathelyi
375c423a85 Archie: 128bit SDRAM interface (by Sorgelig) 2019-10-18 20:56:39 +02:00
Gyorgy Szombathelyi
7122e993fc Archie: reduce clock to 40MHz 2019-10-18 20:39:40 +02:00
Gyorgy Szombathelyi
46bd0dd0c1 Archie: common FDC with the ST core 2019-10-18 19:54:03 +02:00
harbaum
0beaddcc8e MIDI connector fix 2019-10-14 10:55:56 +02:00
harbaum
88c3843020 Board CAD for case design 2019-10-10 13:47:52 +02:00
gyurco
031bd5967a Merge pull request #118 from gyurco/c16 
[C16] Ignore TED test bit
 2019-09-21 14:43:14 +02:00
Gyorgy Szombathelyi
846f115fc1 [C16] Ignore TED test bit 
Fixes Adventure Park
 2019-09-21 14:36:39 +02:00
gyurco
d4b00a4816 Merge pull request #117 from gyurco/c16 
C16: couple of TED fixes
 2019-09-21 01:37:56 +02:00
Gyorgy Szombathelyi
41fc98a704 [C16] Fix charpos reload latching (Alpharay bottom line) 2019-09-20 23:20:48 +02:00
Gyorgy Szombathelyi
a446f48412 [C16] Fix HSP scrolling in Alpharay 2019-09-20 21:53:34 +02:00
Gyorgy Szombathelyi
9c444892ad [C16] Fix videocounter latching condition 
Fixes Pets Rescue title screen
 2019-09-19 21:15:14 +02:00
gyurco
b720ed75a5 Merge pull request #113 from gyurco/gameboy 
[Gameboy] Fix CGB cart detection
 2019-07-18 16:31:23 +02:00
Gyorgy Szombathelyi
ddd7239bf7 [Gameboy] Fix CGB cart detection 2019-07-17 18:12:47 +02:00
gyurco
979de62a11 Merge pull request #112 from gyurco/gameboy 
HT1080Z core + Gameboy updates
 2019-07-07 01:56:50 +02:00
Gyorgy Szombathelyi
4793508d64 [Gameboy] Fix original GameBoy sprites in GBC mode 2019-07-07 01:54:44 +02:00
Gyorgy Szombathelyi
2f5c55961b [Gameboy] GB games in GBC mode fix, uses 1st BGDP and 2 first OBPD registers to store color data (brNX) 2019-07-05 12:32:37 +02:00
Gyorgy Szombathelyi
3096cb1497 [Gameboy] silence warnings 2019-07-05 12:32:37 +02:00
Gyorgy Szombathelyi
7b00770fc2 [Gameboy] T80 accumulator default fix 2019-07-05 12:32:37 +02:00
Gyorgy Szombathelyi
8300476140 [Gameboy] Sprite fixes from brNX 2019-07-05 12:32:37 +02:00
Gyorgy Szombathelyi
393aa60b0a [Gameboy] Remove unused PLL port 2019-07-05 12:32:37 +02:00
Gyorgy Szombathelyi
6937ca5902 [Gameboy] Further video update from brNX 2019-07-05 12:32:37 +02:00
Gyorgy Szombathelyi
0c539c43b3 [Gameboy] Use dedicated PLL output for SDRAM_CLK 
No need to invert the clock then
 2019-07-05 12:32:37 +02:00
Gyorgy Szombathelyi
0b7bd18ec9 HT1080Z: core from Jozsef Laszlo (rbendr@gmail.com) 
A Hungarian school-computer, TRS80 Model I clone
 2019-07-05 12:16:36 +02:00
Gyorgy Szombathelyi
c5b061fbcf [C16] More straightforward writing of RAS-to-CAS timing 2019-05-07 14:40:49 +02:00
Gyorgy Szombathelyi
743b5194d4 [C16] Don't override ROM area with injected variables 
Fixes #108
 2019-05-06 22:24:19 +02:00
Gyorgy Szombathelyi
1213696851 [C16] Amplify TED sounds a bit 2019-05-04 23:55:06 +02:00
Gyorgy Szombathelyi
f3b2572389 [C16] Support for Function ROMs 2019-05-04 23:47:23 +02:00
Gyorgy Szombathelyi
0a857fd788 [C16] Move ROMs to SDRAM to free up some BRAM 2019-05-04 21:47:37 +02:00
Gyorgy Szombathelyi
1ce2a26d96 [C16] Forgot to invert csync from scandoubler output 2019-05-04 14:36:45 +02:00
Gyorgy Szombathelyi
e16e9b23e9 [C16] Send tape motor enable to UART_TX 2019-05-02 22:58:10 +02:00
Gyorgy Szombathelyi
80f2a2c0e7 [C64] Send tape motor signal to UART_TX 2019-05-02 22:57:22 +02:00
gyurco
dc64adaef4 Merge pull request #107 from gyurco/c16 
C16 some SDRAM + HSync
 2019-05-02 21:33:07 +02:00
Gyorgy Szombathelyi
86ae4c52df [C16] HSync from TED already low active 2019-05-02 21:19:46 +02:00
Gyorgy Szombathelyi
53ab2c9900 [C16] SDRAM addressing fixes 
- 32 MB = 24 bits word address
- C16 uses the low byte of the address for RAS, make it similar in
  the SDRAM controller, so SDRAM command can be started sooner
- This means it's OK to delay writing to c16_a_hi, no need for
  async clock
- Use word addressing for TAP
 2019-05-02 21:19:46 +02:00
gyurco
9b5ed8cbc4 Merge pull request #106 from gyurco/c16 
C16 SID + TAP
 2019-05-01 21:07:20 +02:00
Gyorgy Szombathelyi
3f20fbd202 [C16] Add SID card support 2019-05-01 21:03:23 +02:00