antonblanchard.microwatt

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e1bac4d6e7 Reset TB and DECR Anton Blanchard 2021-01-03 16:07:46 +11:00
39c826aa46 Merge pull request #261 from antonblanchard/wishbone_layout Anton Blanchard 2020-12-21 14:36:19 +11:00
ebe696affc Merge pull request #260 from paulusmack/misc Anton Blanchard 2020-12-21 11:41:19 +11:00
c6dfc19d89 Make wishbone_master_out and wb_io_master_out match Anton Blanchard 2020-12-20 21:11:17 +11:00
e41cb01bca fetch1: Fix debug stop Paul Mackerras 2020-12-19 17:11:53 +11:00
97586e7e99 soc: Drive uart1_irq to 0 when we don't have UART1 Paul Mackerras 2020-12-17 12:15:31 +11:00
5eb351b4be Reset JTAG/DMI Anton Blanchard 2020-12-15 14:27:26 +11:00
d96ee21c39 Merge pull request #256 from antonblanchard/flash-reset Michael Neuling 2020-12-15 08:54:56 +11:00
f4831507b3 Merge pull request #257 from antonblanchard/nofpu-fix Paul Mackerras 2020-12-15 08:51:33 +11:00
c870040a20 Fix an issue in flash controller when BOOT_CLOCKS is false Anton Blanchard 2020-12-14 16:54:07 +11:00
659be2780f Fully initialize FPU buses when FPU is disabled Anton Blanchard 2020-12-13 16:01:45 +11:00
7c8bc85e44 Fix a few reset issues in flash controller Anton Blanchard 2020-12-12 13:19:52 +11:00
ab2c87a161 Update JTAG TAP controller for Microwatt jtag-port-2 Anton Blanchard 2020-12-08 18:55:08 +11:00
7b054363c2 First pass at an external JTAG port Anton Blanchard 2020-12-08 07:21:50 +11:00
6dbc7c0559 Update JTAG TAP controller for Microwatt jtag-port Anton Blanchard 2020-12-08 18:55:08 +11:00
17d533219b First pass at an external JTAG port Anton Blanchard 2020-12-08 07:21:50 +11:00
081dc64d39 Merge pull request #255 from antonblanchard/log-length Anton Blanchard 2020-12-08 21:36:00 +11:00
86bdfe6fd4 Merge pull request #254 from antonblanchard/fix-verilator Anton Blanchard 2020-12-08 21:35:25 +11:00
80cf489e96 Add LOG_LENGTH to top-generic.vhdl Anton Blanchard 2020-12-08 19:18:34 +11:00
df8e1ca2a7 Add verilator FPGA target Anton Blanchard 2020-12-08 10:50:48 +11:00
62d5b16c66 Merge pull request #253 from antonblanchard/fix-verilator Anton Blanchard 2020-12-07 22:04:46 +11:00
4bc5169f78 Fix verilator build Anton Blanchard 2020-12-07 21:07:14 +11:00
77c03e5d42 Merge pull request #252 from antonblanchard/hello-world-in-8k Michael Neuling 2020-12-07 16:20:09 +11:00
605010e33d Fix ghdl warning due to variable shadowing in icache Anton Blanchard 2020-12-07 07:17:38 +11:00
bc4e6b7efe Reduce hello_world footprint to fit in 8kB Anton Blanchard 2020-12-03 20:29:40 +11:00
16da9b5ba7 Merge pull request #249 from paulusmack/master Michael Neuling 2020-12-01 11:25:08 +11:00
b60026e7c1 Merge pull request #250 from umarcor/containers Michael Neuling 2020-12-01 11:10:41 +11:00
d839037f0b Merge pull request #251 from umarcor/ci/containers Michael Neuling 2020-12-01 11:06:19 +11:00
93b2987b19 ci: use job.container umarcor 2020-11-30 22:17:13 +01:00
de808d7a6a makefile: update synthesis containers umarcor 2020-11-26 06:14:55 +01:00
d05737833e makefile: whitespace cleanup umarcor 2020-11-30 22:07:57 +01:00
29fabeb12e tests/misc: Add a test for correct CTR and LR updating by branches Paul Mackerras 2020-11-24 12:00:48 +11:00
e49192cb5b execute1: Fix forwarding of result when doing delayed LR update Paul Mackerras 2020-11-24 11:53:17 +11:00
27ac74a341 execute1: Fix writing LR for bdnzl/bdzl instructions Paul Mackerras 2020-11-21 13:54:14 +11:00
1037c6aa2e core: Implement mtmsr instruction Paul Mackerras 2020-11-21 12:45:24 +11:00
144433218f tests/trace: Test trace interrupt vs. FP unavailable interrupt Paul Mackerras 2020-09-25 18:14:18 +10:00
b0f7237b7f execute1: Fix bug in trace interrupt vs. ITLB miss Paul Mackerras 2020-10-03 20:08:11 +10:00
e40e752b9a Merge pull request #245 from paulusmack/fpu Michael Neuling 2020-09-17 12:04:26 +10:00
168d30c07a Merge pull request #244 from paulusmack/master Michael Neuling 2020-09-17 11:43:54 +10:00
73f819301b FPU: Do masking after adder rather than on A input Paul Mackerras 2020-09-12 20:13:24 +10:00
e1ca023bad FPU: Decide on mask length a cycle earlier Paul Mackerras 2020-09-01 15:28:19 +10:00
fb5115c944 FPU: Decide on A input selection a cycle earlier Paul Mackerras 2020-09-01 15:09:17 +10:00
b0b3c0dc70 FPU: Add comments specifying the expectation of r.shift for each state Paul Mackerras 2020-09-01 11:13:17 +10:00
dc1544db69 FPU: Implement floating multiply-add instructions Paul Mackerras 2020-08-01 19:17:36 +10:00
c083b9507d FPU: Implement ftdiv and ftsqrt Paul Mackerras 2020-07-31 16:46:12 +10:00
c350bc1f25 FPU: Implement fsqrt[s] and add a test for fsqrt Paul Mackerras 2020-07-31 12:02:55 +10:00
394f993e75 FPU: Implement frsqrte[s] and a test for frsqrte Paul Mackerras 2020-07-30 16:11:58 +10:00
e1bbb786c0 tests/fpu: Add tests for fsel and fcmpu Paul Mackerras 2020-07-30 13:38:09 +10:00
49f3d1e77a FPU: Implement fcmpu and fcmpo Paul Mackerras 2020-07-30 10:00:25 +10:00
4cd9301da6 FPU: Implement fsel Paul Mackerras 2020-07-29 20:26:39 +10:00
4ad5ab9203 FPU: Implement fre[s] Paul Mackerras 2020-07-29 17:34:03 +10:00
9cce936251 FPU: Implement fdiv[s] Paul Mackerras 2020-07-28 16:07:25 +10:00
e6a5f237bc FPU: Implement fmul[s] Paul Mackerras 2020-07-27 18:27:50 +10:00
86b826cd7e FPU: Implement fadd[s] and fsub[s] and add tests for them Paul Mackerras 2020-07-23 17:56:15 +10:00
4807d0bdb6 FPU: Implement fmrgew and fmrgow and add tests for them Paul Mackerras 2020-07-22 20:51:31 +10:00
0ad2aa3014 FPU: Implement floating round-to-integer instructions Paul Mackerras 2020-07-22 16:13:12 +10:00
03d1aa968a FPU: Implement floating convert to integer instructions Paul Mackerras 2020-07-22 12:19:12 +10:00
36130f1db3 tests/fpu: Add tests for frsp Paul Mackerras 2020-07-19 11:53:01 +10:00
34b5d4a7b5 FPU: Implement the frsp instruction Paul Mackerras 2020-08-31 17:26:33 +10:00
9e8fb293ed FPU: Implement floating convert from integer instructions Paul Mackerras 2020-07-16 15:51:57 +10:00
b628af6176 FPU: Implement fmr and related instructions Paul Mackerras 2020-07-15 14:28:06 +10:00
cb27353f37 tests/fpu: Test remaining FPSCR-related instructions Paul Mackerras 2020-08-31 13:10:51 +10:00
fc2968f132 FPU: Implement remaining FPSCR-related instructions Paul Mackerras 2020-08-29 20:34:55 +10:00
bf1d9e9531 tests/fpu: Add tests for basic FPSCR function and interrupt generation Paul Mackerras 2020-07-15 12:46:18 +10:00
856e9e955f core: Add framework for an FPU Paul Mackerras 2020-08-28 20:01:00 +10:00
76ec1a2f0a tests/fpu: Add tests for lfs and stfs instructions Paul Mackerras 2020-07-02 19:55:30 +10:00
9d285a265c core: Add support for single-precision FP loads and stores Paul Mackerras 2020-08-28 13:35:05 +10:00
bcac4b9b2f tests: Add a test for FP loads and stores Paul Mackerras 2020-07-01 18:03:19 +10:00
45cd8f4fc3 core: Add support for floating-point loads and stores Paul Mackerras 2020-08-28 12:49:48 +10:00
e1672ea709 tests: Add a test for trace interrupts Paul Mackerras 2020-08-29 19:30:56 +10:00
b589d2d472 execute1: Implement trace interrupts Paul Mackerras 2020-08-28 20:34:09 +10:00
6a80825e70 decode1: Avoid overriding fields of v.decode in decode1 Paul Mackerras 2020-08-26 19:19:34 +10:00
da4be71bd3 Merge pull request #239 from paulusmack/master Michael Neuling 2020-08-27 21:28:21 +10:00
e7a08f33eb tests: Add a test for the load-reserve and store-conditional instructions Paul Mackerras 2020-08-22 19:53:59 +10:00
eee90a0815 loadstore1: Generate alignment interrupts for unaligned larx/stcx Paul Mackerras 2020-08-21 12:16:27 +10:00
371fd4cc20 tests: Add tests for 32-bit and big-endian modes Paul Mackerras 2020-08-20 18:03:14 +10:00
033ee909fd core: Implement 32-bit mode Paul Mackerras 2020-08-17 09:38:13 +10:00
2e7b371305 core: Implement big-endian mode Paul Mackerras 2020-08-12 21:59:28 +10:00
3edc95eea5 tests/mmu: Update to use correct MSR values Paul Mackerras 2020-08-20 18:14:16 +10:00
6d6cf59bb7 Merge pull request #235 from paulusmack/master Michael Neuling 2020-08-13 21:50:26 +10:00
741b2e42ac Merge pull request #236 from ozbenh/targets Michael Neuling 2020-08-13 21:46:36 +10:00
679c547e5f fpga: Add support for Genesys2 Boris Shingarov 2020-07-12 14:07:21 -04:00
dbb137437c acorn: Add support for the Acorn CLE 215+ Benjamin Herrenschmidt 2020-07-08 09:37:45 +10:00
d200733252 Merge pull request #229 from ozbenh/litedram Michael Neuling 2020-08-07 14:42:31 +10:00
83816cb9e3 core: Implement BCD Assist instructions addg6s, cdtbcd, cbcdtod Paul Mackerras 2020-08-07 09:57:19 +10:00
7052ceef4a core: Implement the wait instruction as a no-op Paul Mackerras 2020-08-06 20:31:09 +10:00
7246bd6f67 core: Implement the reserved no-op instructions Paul Mackerras 2020-08-06 19:24:40 +10:00
5fafdc56ef core: Implement the addex instruction Paul Mackerras 2020-08-06 19:15:02 +10:00
1a7aebeef8 Add random number generator and implement the darn instruction Paul Mackerras 2020-08-05 15:28:45 +10:00
290b05f97d core: Implement the maddhd, maddhdu and maddld instructions Paul Mackerras 2020-08-04 20:02:30 +10:00
8edfbf638b core: Implement the cmpeqb and cmprb instructions Paul Mackerras 2020-08-03 22:30:23 +10:00
b739372f7e core: Implement the bpermd instruction Paul Mackerras 2020-08-03 14:45:19 +10:00
cce34039c3 core: Implement the setb instruction Paul Mackerras 2020-08-03 14:31:58 +10:00
fa77a6f683 core: Implement the mcrxrx instruction Paul Mackerras 2020-08-03 10:29:46 +10:00
0fb8967290 core: Implement the TAR register and the bctar instruction Paul Mackerras 2020-08-03 10:08:33 +10:00
081684273e execute1: Use r.<field> not v.<field> in countzero code Paul Mackerras 2020-07-28 12:09:02 +10:00
f1238299bd execute1: Take an extra cycle for OE=1 multiply instructions Paul Mackerras 2020-07-27 18:54:27 +10:00
535341961d multiplier: Generalize interface to the multiplier Paul Mackerras 2020-07-25 18:23:11 +10:00
178d7680af Merge pull request #233 from paulusmack/master Michael Neuling 2020-07-22 19:51:24 +10:00
ea0b843662 loadstore1: Better expression for store data formatting Paul Mackerras 2020-07-18 16:37:03 +10:00

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