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mirror of synced 2026-01-25 11:26:37 +00:00

261 Commits

Author SHA1 Message Date
Romain Dolbeau
f81e4fedcd oups, forgotten files for DDR3 hardware initializer based on gist 529a4d9994f0cc95e45382e4eb253b09-3c8bb9c1f4528ccb0c0ef603d66f05b1470e8056 2022-01-29 11:23:23 +01:00
Romain Dolbeau
543cc9d2e1 git ignore 2022-01-29 11:19:37 +01:00
Romain Dolbeau
d753f0ad3a oups, missing file 2022-01-29 11:15:10 +01:00
Romain Dolbeau
9ae081ed19 preliminary i2c support via the OC I2C ctrl & betrustedio wrapper
Now with a NetBSD driver (based on the OpenBSD one) that shows the i2c bus, and some prom support. Not tested with a device, waiting on custom Pmod.
2022-01-29 10:53:20 +01:00
Romain Dolbeau
8f017f5b92 improve backplate 2022-01-29 10:49:35 +01:00
Romain Dolbeau
3e7bd4c8ab fix sdram prom config fix, drop DMA from the sdram DMA and talk to a native SDRAM port instead 2022-01-26 22:45:22 +01:00
Romain Dolbeau
9ff265446d fix sdram prom config for 90 MHz sysclk 2022-01-25 23:13:57 +01:00
Romain Dolbeau
fa5401fb00 update README 2022-01-08 10:41:38 +01:00
Romain Dolbeau
479b976567 changes to be able to test cg3/cg6 support with original PROM contents 2022-01-08 10:34:34 +01:00
Romain Dolbeau
7fb915237d add support for alu/mode used by 501-2253/2325 PROMs 2022-01-08 10:30:59 +01:00
Romain Dolbeau
2aec1af733 Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main 2021-12-19 18:50:39 +01:00
Romain Dolbeau
43efe14afb Simple model of SBus retainer 2021-12-19 18:50:32 +01:00
Romain Dolbeau
6e7bb3b1e3 Emulate a bw2 FB, mostly to test feasibility of 1bpp FB in Litex 2021-12-18 11:30:45 +01:00
Romain Dolbeau
d95a233268 record/layour for cmap/omap 2021-12-05 11:26:59 +01:00
Romain Dolbeau
45292aea6f layout for dma_blk fifo (instead of raw offsets) 2021-12-04 15:56:59 +01:00
Romain Dolbeau
56586bcdf1 upd readme 2021-11-20 08:38:37 +01:00
Romain Dolbeau
429697db18 minor details, more non-working intr code 2021-11-20 08:38:03 +01:00
Romain Dolbeau
802d8118c5 better sd(ram|card) drivers 2021-11-19 21:27:38 +01:00
Romain Dolbeau
c9fbaf61f8 various updates, and prom driver for sdcard 2021-11-17 19:19:32 +01:00
Romain Dolbeau
a3d210b27f can't get async (interrupt-based) sdram driver to work 2021-11-14 15:28:40 +01:00
Romain Dolbeau
a944704ef4 sdcard, interrupt line on sdram 2021-11-13 12:42:18 +01:00
Romain Dolbeau
94c36e7a36 fb stuff 2021-11-13 12:41:37 +01:00
Romain Dolbeau
42f39c846f drop V1.0 2021-11-13 12:41:05 +01:00
Romain Dolbeau
334759951b cleanup, preliminary sdcard driver 2021-11-13 12:40:34 +01:00
Romain Dolbeau
893e5a7c67 Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main 2021-11-13 12:05:05 +01:00
Romain Dolbeau
f6b7dcaba3 upd backplate 2021-11-13 12:04:26 +01:00
Romain Dolbeau
3af873fdb7 add remove functions, doesn't help 2021-11-07 08:52:56 +01:00
Romain Dolbeau
98ba64beda cleanup 2021-11-07 08:52:16 +01:00
Romain Dolbeau
479c780b27 cleanup 2021-11-06 10:21:59 +01:00
Romain Dolbeau
87687de1ea comment 2021-11-06 10:19:07 +01:00
Romain Dolbeau
3c96a56dfb fix checksum-less building 2021-11-06 10:18:23 +01:00
Romain Dolbeau
ef9d16507b use fth cst 2021-11-06 10:18:02 +01:00
Romain Dolbeau
35dee425e9 typo fix 2021-11-06 10:17:51 +01:00
Romain Dolbeau
d7d1772a48 Add sext.b to Vex, as some are generated in -O2/-O3 (none in -Os) 2021-11-01 15:23:27 +01:00
Romain Dolbeau
671953941f Add FSR to Vex, use it for unaligned blits 2021-11-01 14:34:34 +01:00
Romain Dolbeau
97f688dd7d Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main 2021-10-31 19:59:07 +01:00
Romain Dolbeau
2cda6c49d6 minor changes 2021-10-31 19:58:19 +01:00
Romain Dolbeau
c20d1f321f smaller vex 2021-10-31 19:57:39 +01:00
Romain Dolbeau
afdfe4a686 support more Po2 FB sizes 2021-10-30 12:51:02 +02:00
Romain Dolbeau
6f04a9bd73 more configuratble blit rom 2021-10-30 11:53:09 +02:00
Romain Dolbeau
417095d2c0 extrac cycle to meet timings at 1920x1080@60 when using HW cursor 2021-10-30 11:52:58 +02:00
Romain Dolbeau
f57a22e434 add a (working this time) Dcache to Vex 2021-10-30 11:52:01 +02:00
Romain Dolbeau
c2da8f5633 more improvements 2021-10-30 11:41:05 +02:00
Romain Dolbeau
1344a2e7e7 Font for the on-screen debug display 2021-10-30 10:04:12 +02:00
Romain Dolbeau
a85542d029 CG6 accel emulation (still slow) 2021-10-30 10:03:11 +02:00
Romain Dolbeau
f5a1067806 fix broken timeout, some (disabled, for testing) stat stuff 2021-10-30 10:02:33 +02:00
Romain Dolbeau
06bff62901 move the wishbone CDC locally ; speedgrade from part 2021-10-30 10:01:26 +02:00
Romain Dolbeau
dea62d3d73 trying to improve the timing in the vga_clk domain 2021-10-24 20:02:59 +02:00
Romain Dolbeau
fa0387fe96 trying to improve the cg accel stuff 2021-10-24 20:02:34 +02:00
Romain Dolbeau
ee1e8d3450 Dcache-less Vex 2021-10-24 20:02:02 +02:00