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synced
2026-03-05 02:15:26 +00:00
9437d287db
read PROM from Wishbone (simplify things, save resources as it was mapped there already anyway), add sd_card (unused, un-promed yet)
2021-07-14 08:30:27 -04:00
b46bdf382a
update prom
2021-07-14 06:36:56 -04:00
d42a4672f9
fix export for driver
2021-07-14 06:36:35 -04:00
1f733a1a4c
driver to initialize the SDRAM (should be done in the PROM, but easier in C...)
2021-07-14 06:35:58 -04:00
bd011b9d9f
Forgotten-to-commit update
2021-07-14 06:35:20 -04:00
b98fedf47a
cleanup, CSR for prom & netbsd (preliminary)
2021-07-14 05:15:42 -04:00
b2ff488740
prom
2021-07-14 05:14:19 -04:00
4ca79c1a17
more up-to-date
2021-07-03 10:18:45 +02:00
a5f3049bc9
add a pwr header (for e.g. non-pwm fan)
2021-07-02 17:41:05 +02:00
e066391b28
more stuff
2021-07-02 08:54:39 +02:00
0aca436d5b
more stuff
2021-07-02 08:53:51 +02:00
dd6ca0b233
update some MPN w/ SeeedStudio replacement
2021-07-01 19:34:47 +02:00
e871a543f7
fix footprints for SeeedStudio DRC results
2021-07-01 08:18:36 +02:00
adf6017df9
fix footprints for SeeedStudio DRC results
2021-06-30 13:28:43 +02:00
c8591a89f8
redrill
2021-06-30 10:58:00 +02:00
a629f39108
Commit first go at v1.2 (updated BOM generator)
2021-06-30 10:14:31 +02:00
02d604456f
Commit first go at v1.2
2021-06-30 10:12:47 +02:00
564c5276dc
drop unused file
2021-06-27 09:52:07 -04:00
1c69ec1d6f
configure the sdram; prom is not initializing it properly yet
2021-06-27 09:49:46 -04:00
4db36f28ae
tentative USB schematic (unsonnected)
2021-06-26 15:29:00 +02:00
4dd8693576
DMA supports byte & hword (needed), identify devices but unstable
2021-06-25 06:43:19 -04:00
6459b79ed1
bring back cross-domain using a wishbone adapter
2021-06-24 05:00:36 -04:00
d3aa008b8b
cleanups
2021-06-23 07:56:39 -04:00
4ad0a648e3
swap endianness on flash prefix
2021-06-23 03:48:25 -04:00
da0c49062d
deleted
2021-06-22 14:56:51 -04:00
b6bbbd05e8
HWord support, needed
2021-06-21 13:17:08 -04:00
c8baa1fb6e
Byte support, needed; still need HWord...
2021-06-21 12:54:10 -04:00
df88e17e9d
upd
2021-06-21 11:40:17 -04:00
5cdec193d2
oups
2021-06-21 03:15:39 -04:00
b2e4a450e1
Still very wonkey, DMA burning cycles
2021-06-21 03:04:51 -04:00
c9269b9f2e
not yet working , DMA very suspicious, at least interrupt seems to propagate...
2021-06-20 11:22:15 -04:00
0297df0131
not working, the DMA seems to fails at frame 3...
2021-06-19 11:40:36 -04:00
c649cc4440
drop address mapping, simply map the NetBSd DVMA virtual space (?) as Wishbone physical address
2021-06-19 04:00:06 -04:00
3c7fefadb9
still some issues on registers, master mode draft
2021-06-19 02:10:54 -04:00
8f4d05c872
timeout to avoid hang when something on the wishbone is a bit slow
2021-06-17 10:00:08 -04:00
3b1a8bf5cf
read/write registers in Wishbone space (burst untested)
2021-06-15 12:03:04 -04:00
0759bad402
Add a FIFO for CDC between SBus (in cd_sbus) and Wishbone (in a 100 MHz cd_sys)
2021-06-15 09:59:51 -04:00
98ec770e68
fix wishbone.sel, now the PROM can control the LEDs :-)
2021-06-15 05:32:36 -04:00
5c66170a3a
Wishbone is word-addressed (still no lock)
2021-06-15 02:31:07 -04:00
49b4dae59d
more cleanups, Chaser still not going to control mode :-/
2021-06-14 09:20:44 -04:00
94a2a7eb7a
more grrrr syntax
2021-06-13 14:19:55 -04:00
914e44a463
grrrr, syntax
2021-06-13 13:37:24 -04:00
156c2960c8
more stuff, with some weird bugs...
2021-06-13 12:42:35 -04:00
a7e05afe1c
PoC for Migen version of the SBus slave FSM; is recognized by PROM
2021-06-13 04:07:04 -04:00
b6534c2615
FAT now mount RO, to be tested more thoroughly
2021-03-21 11:12:30 -04:00
2c8c294090
update status
2021-03-16 13:50:53 -04:00
3335f1991a
save current status; can read label but not yet mount a partition...
2021-03-16 04:47:42 -04:00
4b2f974e12
Userland SW bug :-(, seem to work now, disabling some debug stuuf
2021-02-28 03:51:05 -05:00
aa8f136c04
error msg on timeout
2021-02-28 03:50:11 -05:00
cebda9e613
HW post-increment of counter in AES for GCM
2021-01-24 06:47:05 -05:00
22bcceb3a6
screenshot of prom view
2021-01-24 05:07:40 -05:00
5feba64038
byte-reverse in word for GCM
2021-01-23 10:14:15 -05:00
60c5f7a767
aes256 ioctl
2021-01-23 09:15:08 -05:00
64ddf0f1c3
status
2021-01-23 12:01:34 +01:00
5986a8e30b
nothing doing, SPI-mode SD won't work reliably :-(
2021-01-17 08:16:25 -05:00
119862f57f
switch to different sdcard controller, still not working
2021-01-16 03:17:47 -05:00
1dbdf68b8c
parametrize timeout max
2021-01-13 04:47:10 -05:00
f5c79291dd
fix pullup
2021-01-13 04:46:45 -05:00
1cb38e9036
oups, typo
2021-01-12 07:10:34 -05:00
1bebc85b66
commit attempt at writing to sd-card, which has broken reading ?\!?
2021-01-11 09:35:56 -05:00
ecc442995f
enable rst on sdcard fifo
2021-01-10 13:27:43 -05:00
99e613497d
fix sdcard read (cleanup needed)
2021-01-10 13:13:04 -05:00
fa4bd69388
I|O -> IO for master
2021-01-10 17:01:04 +01:00
f568ad0bd3
can read some blocks from sd-card, but then something fails and the wrapper won't acknowledge the rd_addr handshake :-(
2021-01-10 10:37:16 -05:00
7a5479f766
add 5 MHz timecounter to rdfpga_trng
2021-01-10 03:29:28 -05:00
c0a8de2d3e
split DMA CTRL/ADDR to one per feature (GCM_R, AES_R, AES_W)
2021-01-09 17:43:28 -05:00
7ab8566915
have a fisrst go at RDOL,sdcard (nor working) as a third device with the XESS sd-card controller.
2021-01-09 17:12:17 -05:00
d2cc1412c2
reindent
2021-01-09 16:05:10 -05:00
91b6e04f92
drop some old commented-out stuff
2021-01-09 16:04:08 -05:00
ff3e2deeb6
Add a secondary driver for a pretend-trng (it's a prng at this stage, the trng I found won't synthesize)
2021-01-09 15:57:03 -05:00
f3ac0898ba
PROM with a second device (not yet in HW), by abusing the tokenizer a bit (OF doesn't behave as OBP2 for siblings)
2021-01-09 14:02:29 -05:00
007add0015
new device name, trying to figure out how to have siblings device in the PROM
2021-01-09 13:37:43 -05:00
cc18210794
more constants, more room for the prom
2021-01-09 12:12:10 -05:00
753ddd3106
DMA for cbc decrypt
2021-01-09 11:48:27 -05:00
20fbac086c
PIO decrypt of CBC
2021-01-09 09:02:43 -05:00
8e27ed97e6
pipeline AES DMAs
2021-01-09 08:17:46 -05:00
140fb92032
split AES DMA in two control registers (for future pipelining?)
2021-01-09 07:22:13 -05:00
58bcaeec5a
constant-ify
2021-01-09 06:35:17 -05:00
54a2fabe4f
make AES asynchronous behind a couple FIFOs, now running at 120 MHz
2021-01-04 10:18:21 -05:00
ccdbf0c454
add timing constraints for master signals
2021-01-09 05:12:39 -05:00
92b48ce7e1
encdec signal for AS (unused)
2021-01-09 04:58:27 -05:00
a80fed802a
fix multi-session
2021-01-03 10:13:45 -05:00
766b7d1e06
try multi-sessions; there could be a race condition for keys, and device is too busy leading to failure...
2021-01-03 07:59:09 -05:00
0e570cc871
aes-256-cbc
2021-01-03 06:44:15 -05:00
6e3bf32634
Move CTRLs registers around, add 4 key registers/preliminary HW support for AES256
2021-01-03 06:12:29 -05:00
cec1eae5e5
rename fifo to uart
2020-12-22 11:07:57 -05:00
2001f54c45
Move the AES block to https://github.com/secworks/aes (slower at this time, but has decrypt & 256 bits support)
2020-12-22 09:48:13 -05:00
2eba35f890
DMA busmaster AES-128-CBC
2020-12-22 05:14:27 -05:00
7992fd2b94
cleanup
2020-12-21 11:13:22 -05:00
55b8b7697e
enable the XOR in HW for CBC mode, some R/W protect on registers
2020-12-21 09:03:57 -05:00
0f737c1064
switch driver code to basic aes128-cbc support, where openssl and devcrypto are in agreement
2020-12-21 06:59:44 -05:00
c7ecb4b128
Having a go at basic opencrypto/aes-ctr support, but it seems OpenSSL and /dev/crypto disagree on the interface :-(
2020-12-21 05:27:36 -05:00
8afe45ea54
Adding basic AES support (using AES block from https://github.com/mbgh/aes128-hdl )
2020-12-19 11:43:56 -05:00
1b25261073
Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
2020-12-19 07:21:42 -05:00
b7244a4060
unify LED register with others
2020-12-19 05:59:07 -05:00
d1aa7748ea
new prom
2020-12-18 19:55:22 +01:00
fe5f869db0
new prom
2020-12-18 13:50:08 -05:00
d5a5041562
larger DMA burst (Burst16 disabled, as it doesn't work on the SS20, presumably hitting the limit of the 'up-burst-sizes' attribute https://mail-index.netbsd.org/port-sparc/2020/12/18/msg002291.html )
2020-12-18 12:47:33 -05:00
75d40d76c1
add soe rigidity
2020-12-18 16:55:44 +01:00
62198d5494
12 bits of blocks in GCM DMA
2020-12-18 10:15:05 -05:00
Romain Dolbeau