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Commit Graph

  • e1932dc8b6 Add files via upload doc Olof Kindgren 2020-05-20 14:20:48 +00:00
  • 40b018af66 Align RISC-V compliance test target code with upstream changes Olof Kindgren 2020-05-08 22:56:31 +02:00
  • dd65d6097a Update alhambra board (#29) Iñigo Muguruza 2020-05-08 13:38:33 +02:00
  • 794748dac4 Add support for LX9 Microboard Olof Kindgren 2020-05-06 20:51:55 +02:00
  • 95c5c027a1 Add Saanlima pipistrello spartan6 LX45 Gwenhael Goavec-Merou 2020-05-06 20:10:13 +02:00
  • 2a76adc8db Add compatibility with Xilinx ISE Gwenhael Goavec-Merou 2020-05-06 20:07:29 +02:00
  • c0fc72b353 Add upduino2 servant target Olof Kindgren 2020-04-27 13:58:32 +02:00
  • 6ddf4b5a46 Add Alhambra board to repo (#23) Iñigo Muguruza 2020-04-23 09:07:28 +02:00
  • a4eb6c01fe Add ulx3s 85k servant target Olof Kindgren 2019-08-25 22:41:46 +02:00
  • b2004f741a Update README Olof Kindgren 2020-04-21 12:28:42 +02:00
  • 4f902829a3 Bump core version serv-1.0.1 Olof Kindgren 2020-04-19 23:06:54 +02:00
  • fda7dd288a Optimize enable signal for mem_if buffers Olof Kindgren 2020-04-14 16:54:05 +02:00
  • 1d311edb7d Make counter internal in serv_state Olof Kindgren 2020-04-10 21:54:54 +02:00
  • 3829d05786 Add zcu106 support to servant Olof Kindgren 2020-04-15 10:18:06 +02:00
  • 09c7d6dbbf Remove FSM from serv_state Olof Kindgren 2020-04-05 00:22:44 +02:00
  • 8dd75fa752 Stop using states in logic expressions Olof Kindgren 2020-04-04 23:44:29 +02:00
  • 9a8dcde030 Simplify o_dbus_adr assignment Olof Kindgren 2020-04-03 22:58:24 +02:00
  • 4f855602fa Add serving SoClet Olof Kindgren 2020-03-27 09:08:02 +01:00
  • 6b0e4fb3ea Disable misalignment traps when CSR is disabled Olof Kindgren 2020-03-27 08:55:34 +01:00
  • 726e520cce Fix lint warnings when CSR is disabled Olof Kindgren 2020-03-17 22:24:14 +01:00
  • b4a0015dc4 Fix linker script Olof Kindgren 2020-03-22 15:19:55 +01:00
  • 2a7596b51d Declare variables/nets before referenced dh73 2020-03-25 11:02:43 -06:00
  • eff17d2f7c Prepare for release v1.0 1.0.0 Olof Kindgren 2020-03-04 22:34:46 +01:00
  • 3e9e25e984 Avoid resetting bufreg Olof Kindgren 2020-03-03 09:21:55 +01:00
  • c9a3c883f1 Refactor testbench Olof Kindgren 2020-03-03 09:15:50 +01:00
  • 3468958f1e Whitespace fixes Olof Kindgren 2020-03-02 21:20:51 +01:00
  • e2147776f2 servant: Rename some wires Olof Kindgren 2020-03-02 16:29:01 +01:00
  • b48b02b8df Add parameter to disable CSR/interrupts Olof Kindgren 2019-12-01 20:54:54 +01:00
  • fca1527dd7 Add cyc1000 target Olof Kindgren 2019-10-21 15:24:33 +02:00
  • e39b4770fd Add quartus-friendly RAM implementation Olof Kindgren 2020-02-29 13:10:09 +01:00
  • ea1936710e Inline ser_lt Olof Kindgren 2020-02-19 13:15:18 +01:00
  • afb7e641dd Inline adders Olof Kindgren 2020-02-19 11:00:55 +01:00
  • 7f16f17ca5 Optimize CSR immediate handling Olof Kindgren 2020-02-19 10:02:48 +01:00
  • badcd7ea55 Remove duplicate signals in serv_state Olof Kindgren 2020-02-17 23:48:39 +01:00
  • 36746d3890 Remove unused signals Olof Kindgren 2020-02-17 23:01:49 +01:00
  • 5aa1fbe709 Stop depending on run state Olof Kindgren 2019-12-08 22:51:28 +01:00
  • 6067b0e684 Use one-hot encoding for ALU rd sel Olof Kindgren 2019-12-07 23:36:36 +01:00
  • eb5d25ea1c Move op_b mux to alu Olof Kindgren 2019-12-07 23:09:04 +01:00
  • b516c10d72 Prepare for RF write on RF read request and optimize state FSM Olof Kindgren 2019-12-07 23:01:24 +01:00
  • 31c138e4a1 Create RAM and RF IF with configurable widths Olof Kindgren 2019-12-05 13:56:26 +01:00
  • 68d8af71f2 Use serv_rf_top in default and lint targets Olof Kindgren 2019-12-05 22:35:14 +01:00
  • e93fd0d30e Fix compile errors with RISCV_FORMAL Olof Kindgren 2019-12-04 23:42:40 +01:00
  • 3179cfb107 Optimize alu eq_r and lt_r Olof Kindgren 2019-12-03 10:28:27 +01:00
  • 8b82c85fb6 Create toplevel without RF Olof Kindgren 2019-11-20 18:23:19 +01:00
  • 4532c8dafd Move rd selection to rf_if Olof Kindgren 2019-10-31 21:44:52 +01:00
  • 04037c4354 Split out RF to separate module Olof Kindgren 2019-10-30 08:25:31 +01:00
  • fc348f3a22 Fix wen delays in rf Olof Kindgren 2019-10-30 12:38:20 +01:00
  • a7d7d6475b Update Zephyr port to v1.14 Olof Kindgren 2019-11-19 13:44:17 +01:00
  • 40000cbeb9 Fix IRQ Olof Kindgren 2019-11-17 22:40:53 +01:00
  • 603c168d9b Allow readback of GPIO signal Olof Kindgren 2019-11-19 10:32:32 +01:00
  • ed02951b4d Add vcd_start parameter Olof Kindgren 2019-11-19 10:30:03 +01:00
  • 40e7855bac Add width and divider parameters to servant_timer Olof Kindgren 2019-11-19 10:20:34 +01:00
  • 1a961af5ac Only allocate used RF mem Olof Kindgren 2019-11-09 23:41:23 +01:00
  • 61c8a6b886 add arty_a7_35t support Gwenhael Goavec-Merou 2019-11-10 17:39:17 +01:00
  • d90030b955 xilinx PLL: allows to specify PLL output frequency (16 or 32 MHz) Gwenhael Goavec-Merou 2019-11-10 17:32:38 +01:00
  • 1f6d215d19 README: argument to use blinky example instead of hello world is true for all boards Gwenhael Goavec-Merou 2019-11-10 15:28:40 +01:00
  • cf187bc81e README: --firmware parameter only available for sim and verilator_tb targets Gwenhael Goavec-Merou 2019-11-07 08:46:34 +01:00
  • 529cf6192b path correction and little comment (#12) Fabien Marteau 2019-11-05 10:05:00 +01:00
  • 9c83e39635 Initialize state of verilator UART decoder Olof Kindgren 2019-11-04 13:01:31 +01:00
  • 98bfcc3b62 Remove unused jalr signal Olof Kindgren 2019-10-03 14:30:10 +02:00
  • 75decc8251 Bring back old immediate decoder Olof Kindgren 2019-09-26 20:21:36 +02:00
  • ab39209773 Move servant arbiter below dbus mux Olof Kindgren 2019-10-24 13:45:26 +02:00
  • 72e34ce795 Simplify servant_arbiter Olof Kindgren 2019-10-24 13:24:09 +02:00
  • 4f32975989 Consistent naming of servant components Olof Kindgren 2019-10-24 13:18:06 +02:00
  • 9b5401811e servant: Only ignore memfile for verilator Olof Kindgren 2019-10-21 15:26:31 +02:00
  • 57b4fca05f Ignore initial garbage in verilator UART decoder Olof Kindgren 2019-10-21 15:26:05 +02:00
  • 574464a33b De-pipeline alu_result_sel Olof Kindgren 2019-09-27 17:48:36 +02:00
  • b9a9e99e2b Suppressing some verilator lint warnings Fabien Marteau 2019-10-22 09:55:31 +02:00
  • e5061ca5f8 Update README.md (#9) Fabien Marteau 2019-10-22 09:15:35 +02:00
  • 8bc54a99ad Move mcause generation to serv_csr Olof Kindgren 2019-09-25 23:08:38 +02:00
  • 2b5c71fe9b Gate mem_rd in mem_if Olof Kindgren 2019-09-26 23:31:23 +02:00
  • 0f767ad2d3 Gate mem_misalign in mem_if Olof Kindgren 2019-09-26 23:23:42 +02:00
  • 5b96b3a938 Simplify jump flag Olof Kindgren 2019-09-26 23:12:07 +02:00
  • 7bd89deb41 Simplify mret/csr address generation Olof Kindgren 2019-09-24 07:38:47 +02:00
  • 126937f16a Rewrite RF and state machine Olof Kindgren 2019-09-17 16:01:43 +02:00
  • 8481fb46a1 Remove dead code Olof Kindgren 2019-09-23 21:10:08 +02:00
  • bad823ff6d Fix syntax error for o_take_branch Olof Kindgren 2019-09-21 23:01:32 +02:00
  • ca2beaf786 Pass rf_rreq through serv_state Olof Kindgren 2019-09-16 20:54:26 +02:00
  • 3d6eb3feca Separate rf_ready and dbus_ack Olof Kindgren 2019-09-16 19:15:20 +02:00
  • 27621a285e rtl: Make compatible to Synopsys Design Compiler Florian Zaruba 2019-09-26 22:47:27 +02:00
  • ec6c7a7cd5 Update README Olof Kindgren 2019-09-16 16:57:56 +02:00
  • 920ad92bc7 Remove unused rs_en signal Olof Kindgren 2019-09-16 10:45:42 +02:00
  • 6518b5f30f Simplify bufreg_hold Olof Kindgren 2019-09-16 09:05:47 +02:00
  • ef7706f26b Simplify two-stage signalling Olof Kindgren 2019-09-16 09:03:02 +02:00
  • d4c782bce6 Set o_dbus_we directly from decode Olof Kindgren 2019-09-16 00:13:21 +02:00
  • b9e410a0a0 Remove bytepos from serv_mem_if Olof Kindgren 2019-09-16 00:07:58 +02:00
  • 5a44634ee5 Avoid exposing funct3 from decode Olof Kindgren 2019-09-15 23:50:02 +02:00
  • 9575eb4fef Separate decode and state Olof Kindgren 2019-09-14 23:55:27 +02:00
  • 7289a68f6e Separate state from o_bufreg_loop Olof Kindgren 2019-09-14 22:52:41 +02:00
  • c0a177aebe Simplify o_alu_cmp_uns Olof Kindgren 2019-09-14 22:21:25 +02:00
  • 1248043a39 Separate state and decode from CSR signals Olof Kindgren 2019-09-14 22:18:03 +02:00
  • ef3fc9274d Rename misleading signal names Olof Kindgren 2019-09-13 23:25:46 +02:00
  • 8c63a1a22f Simplify bufreg.i_clr Olof Kindgren 2019-09-13 23:24:06 +02:00
  • 8dc137fb07 Kill of mem_init and mem_en Olof Kindgren 2019-09-13 23:03:58 +02:00
  • e20e0eef8f Optimize dbus_cyc Olof Kindgren 2019-09-13 22:18:58 +02:00
  • 8cd9742b53 Use two write ports for RF/CSR RAM Olof Kindgren 2019-07-28 13:30:39 +02:00
  • a0ba84096a Simplify csr stuff Olof Kindgren 2019-07-16 23:45:43 +02:00
  • 7425128dd8 Pass imm offsets through bufreg Olof Kindgren 2019-08-22 09:53:14 +02:00
  • 28a2bbdb60 Rename misleading signal name Olof Kindgren 2019-08-17 09:44:13 +02:00
  • 286a07bfc8 Mask rvfi_valid during reset release Olof Kindgren 2019-08-26 23:02:41 +02:00