- ib_rlim_{gen,slv}: new modules for implementation of rate limiters
- ibdr_lp11_buf: new LP11 interface with fifo buffering
- ibdr_maxisys: add ib_rlim_gen, ibdr_lp11_buf
- tbench/test_lp11_all.tcl: tbench for lp11 and lp11_buf
- Rw11CntlLP11: handles now also buffered lp11
- *.Doxyfile: update to 1.8.15 template format (from 1.8.7)
- tst_sram: define and use init_rbf_*
- rbd_rbmon: more robust ack,err trace when busy
- pdp11.vhd: define c_init_rbf_greset
- pdp11_core_rbus: rename state field rbinit to greset
- pdp11_sys70: add and use RESET_SYS; fix pdp11_mem70 reset
- test_cp_ibrbasics.tcl: use imap addresses for test area
- rbmoni/test_regs.tcl: add a few cntl logic tests
- rbmoni/util.tcl: streamline raw_check
- rw11/defs.tcl: define INIT bits
- rw11/tbench.tcl: bench_list: ignore whitespace and empty lines
- tst_sram/util.tcl: define INIT
- use type code instead of boolean for sys_conf_ibd_{dl11,lp11,pc11}
- add sys_conf_ibtst (enabled in all systems)
- add sys_conf_ibd_dz11 (enabled in all systems)
- top-level Makefile: drop w11a/arty_bram
- sys_w11a_s3: set BTOWIDTH 7 (was 6, must be > vmbox atowidth (6))
- RtclGet.ipp: use const& for oper() of string& and Rtime&
- *.Doxyfile: bump version to 0.77
- comment and docu updates
- sys_tst_sram_arty: add system and tb
- sramif_mig_arty: add SRAM to DDR via MIG adapter for arty
- cdc_pulse: add clock domain crossing for a slowly changing value
- cdc_vector_s0: add ENA port (now used in cdc_pulse)
- tst_mig/util.tcl: test_rwait: add optional lena argument
- viv_tools_build.tcl: downgrade SSN critical warnings to warnings
- rtl/sys_gen/*/*.vhd: drop superfluous genlib call
- rtl/sys_gen/*/*.vmfset: accomodate recent code changes
- tools/bin/tbrun: show correct 'found count' in summary message
- tools/dox/*.Doxyfile: push version to 0.753
- tools/src/librtools/Rtime.ipp: change list-init make some gcc happy
- sfs_gsim_core: new common simulation core
- {dcm,s6_cmt,s7_cmt}_sfs_gsim: use now sfs_gsim_core
- s7_cmt_sfs_tb: removed, use now sfs_gsim_core
- rtl/bplib/*/tb/tb_*: use now sfs_gsim_core
- tst_serloop/nexys*/tb/tb_tst_serloop*_n*: use now sfs_gsim_core
- ibdr_maxisys: add IDEC port, connect to EXTEVT of KW11P
- sys_w11a_*.vhd: use DM_STAT_EXP; IDEC to maxisys; setup PERFEXT
- kw11p and dmpcnt now fully setup
- pdp11_sys70: drop ITIMER,DM_STAT_DP, use DM_STAT_EXP, add PERFEXT port
- pdp11_sequencer: drop ITIMER port, use DM_STAT_SE.itimer
- sys_w11a_*.vhd: use DM_STAT_EXP
- some re-wiring, no functional change to CPU or IO system
